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cslr_syscfg0_OMAPL138.h File Reference
#include <csl/cslr.h>
#include "tistdtypes.h"

Go to the source code of this file.

Data Structures

struct  CSL_SyscfgRegs
 

Macros

#define CSL_SYSCFG_REVID_REVID_MASK   (0xFFFFFFFFu)
 
#define CSL_SYSCFG_REVID_REVID_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_REVID_REVID_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_REVID_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR0_DIEID0_MASK   (0xFFFFFFFFu)
 
#define CSL_SYSCFG_DIEIDR0_DIEID0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR0_DIEID0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR1_DIEID1_MASK   (0xFFFFFFFFu)
 
#define CSL_SYSCFG_DIEIDR1_DIEID1_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR1_DIEID1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR2_DIEID2_MASK   (0xFFFFFFFFu)
 
#define CSL_SYSCFG_DIEIDR2_DIEID2_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR2_DIEID2_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR2_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR3_DIEID3_MASK   (0xFFFFFFFFu)
 
#define CSL_SYSCFG_DIEIDR3_DIEID3_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR3_DIEID3_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DIEIDR3_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DEVIDR0_DEVID0_MASK   (0xFFFFFFFFu)
 
#define CSL_SYSCFG_DEVIDR0_DEVID0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_DEVIDR0_DEVID0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_DEVIDR0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_BOOTCFG_SMARTRFLX_MASK   (0x0FFF0000u)
 
#define CSL_SYSCFG_BOOTCFG_SMARTRFLX_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_BOOTCFG_SMARTRFLX_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_BOOTCFG_BOOTMODE_MASK   (0x0000FFFFu)
 
#define CSL_SYSCFG_BOOTCFG_BOOTMODE_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_BOOTCFG_BOOTMODE_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_BOOTCFG_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPREVIDR_CHIPREVID_MASK   (0x0000003Fu)
 
#define CSL_SYSCFG_CHIPREVIDR_CHIPREVID_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_CHIPREVIDR_CHIPREVID_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPREVIDR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_KICK0R_KICK0_MASK   (0xFFFFFFFFu)
 
#define CSL_SYSCFG_KICK0R_KICK0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_KICK0R_KICK0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_KICK0R_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_KICK1R_KICK1_MASK   (0xFFFFFFFFu)
 
#define CSL_SYSCFG_KICK1R_KICK1_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_KICK1R_KICK1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_KICK1R_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_HOST0CFG_BOOTRDY_MASK   (0x80000000u)
 
#define CSL_SYSCFG_HOST0CFG_BOOTRDY_SHIFT   (0x0000001Fu)
 
#define CSL_SYSCFG_HOST0CFG_BOOTRDY_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_HOST0CFG_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_HOST1CFG_BOOTRDY_MASK   (0x80000000u)
 
#define CSL_SYSCFG_HOST1CFG_BOOTRDY_SHIFT   (0x0000001Fu)
 
#define CSL_SYSCFG_HOST1CFG_BOOTRDY_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_HOST1CFG_DSP_ISTP_RST_VAL_MASK   (0x003FFFFFu)
 
#define CSL_SYSCFG_HOST1CFG_DSP_ISTP_RST_VAL_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_HOST1CFG_DSP_ISTP_RST_VAL_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_HOST1CFG_RESETVAL   (0x80000000u)
 
#define CSL_SYSCFG_IRAWSTAT_ADDRERR_MASK   (0x00000002u)
 
#define CSL_SYSCFG_IRAWSTAT_ADDRERR_SHIFT   (0x00000001u)
 
#define CSL_SYSCFG_IRAWSTAT_ADDRERR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IRAWSTAT_ADDRERR_NOTSET   (0x00000000u)
 
#define CSL_SYSCFG_IRAWSTAT_ADDRERR_SET   (0x00000001u)
 
#define CSL_SYSCFG_IRAWSTAT_PROTERR_MASK   (0x00000001u)
 
#define CSL_SYSCFG_IRAWSTAT_PROTERR_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_IRAWSTAT_PROTERR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IRAWSTAT_PROTERR_NOTSET   (0x00000000u)
 
#define CSL_SYSCFG_IRAWSTAT_PROTERR_SET   (0x00000001u)
 
#define CSL_SYSCFG_IRAWSTAT_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IENSTAT_ADDRERR_MASK   (0x00000002u)
 
#define CSL_SYSCFG_IENSTAT_ADDRERR_SHIFT   (0x00000001u)
 
#define CSL_SYSCFG_IENSTAT_ADDRERR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IENSTAT_ADDRERR_NOTSET   (0x00000000u)
 
#define CSL_SYSCFG_IENSTAT_ADDRERR_SET_CLEAR   (0x00000001u)
 
#define CSL_SYSCFG_IENSTAT_PROTERR_MASK   (0x00000001u)
 
#define CSL_SYSCFG_IENSTAT_PROTERR_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_IENSTAT_PROTERR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IENSTAT_PROTERR_NOTSET   (0x00000000u)
 
#define CSL_SYSCFG_IENSTAT_PROTERR_SET_CLEAR   (0x00000001u)
 
#define CSL_SYSCFG_IENSTAT_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IENSET_ADDRERR_EN_MASK   (0x00000002u)
 
#define CSL_SYSCFG_IENSET_ADDRERR_EN_SHIFT   (0x00000001u)
 
#define CSL_SYSCFG_IENSET_ADDRERR_EN_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IENSET_ADDRERR_EN_SET_EN   (0x00000001u)
 
#define CSL_SYSCFG_IENSET_PROTERR_EN_MASK   (0x00000001u)
 
#define CSL_SYSCFG_IENSET_PROTERR_EN_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_IENSET_PROTERR_EN_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IENSET_PROTERR_EN_SET_EN   (0x00000001u)
 
#define CSL_SYSCFG_IENSET_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IENCLR_ADDRERR_CLR_MASK   (0x00000002u)
 
#define CSL_SYSCFG_IENCLR_ADDRERR_CLR_SHIFT   (0x00000001u)
 
#define CSL_SYSCFG_IENCLR_ADDRERR_CLR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IENCLR_ADDRERR_CLR_CLEAR_DIS   (0x00000001u)
 
#define CSL_SYSCFG_IENCLR_PROTERR_CLR_MASK   (0x00000001u)
 
#define CSL_SYSCFG_IENCLR_PROTERR_CLR_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_IENCLR_PROTERR_CLR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_IENCLR_PROTERR_CLR_CLEAR_DIS   (0x00000001u)
 
#define CSL_SYSCFG_IENCLR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_EOI_EOIVECT_MASK   (0x000000FFu)
 
#define CSL_SYSCFG_EOI_EOIVECT_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_EOI_EOIVECT_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_EOI_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_FLTADDRR_FLTADDR_MASK   (0xFFFFFFFFu)
 
#define CSL_SYSCFG_FLTADDRR_FLTADDR_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_FLTADDRR_FLTADDR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_FLTADDRR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_FLTSTAT_ID_MASK   (0xFF000000u)
 
#define CSL_SYSCFG_FLTSTAT_ID_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_FLTSTAT_ID_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_FLTSTAT_MSTID_MASK   (0x00FF0000u)
 
#define CSL_SYSCFG_FLTSTAT_MSTID_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_FLTSTAT_MSTID_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_FLTSTAT_PRIVID_MASK   (0x00001E00u)
 
#define CSL_SYSCFG_FLTSTAT_PRIVID_SHIFT   (0x00000009u)
 
#define CSL_SYSCFG_FLTSTAT_PRIVID_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_FLTSTAT_NOSECACC_MASK   (0x00000080u)
 
#define CSL_SYSCFG_FLTSTAT_NOSECACC_SHIFT   (0x00000007u)
 
#define CSL_SYSCFG_FLTSTAT_NOSECACC_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_MASK   (0x0000003Fu)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_NOFLT   (0x00000000u)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_USREXE   (0x00000001u)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_USRWR   (0x00000002u)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_USRRD   (0x00000004u)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_SPREXE   (0x00000008u)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_SPRWR   (0x00000010u)
 
#define CSL_SYSCFG_FLTSTAT_TYPE_SPRRD   (0x00000020u)
 
#define CSL_SYSCFG_FLTSTAT_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI0_SATA_MASK   (0x00700000u)
 
#define CSL_SYSCFG_MSTPRI0_SATA_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_MSTPRI0_UPP_MASK   (0x00070000u)
 
#define CSL_SYSCFG_MSTPRI0_UPP_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_MSTPRI0_DSP_CFG_MASK   (0x00007000u)
 
#define CSL_SYSCFG_MSTPRI0_DSP_CFG_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_MSTPRI0_DSP_MDMA_MASK   (0x00000700u)
 
#define CSL_SYSCFG_MSTPRI0_DSP_MDMA_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_MSTPRI0_ARM_D_MASK   (0x00000070u)
 
#define CSL_SYSCFG_MSTPRI0_ARM_D_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_MSTPRI0_ARM_I_MASK   (0x00000007u)
 
#define CSL_SYSCFG_MSTPRI0_ARM_I_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI1_VPIF_DMA_1_MASK   (0x70000000u)
 
#define CSL_SYSCFG_MSTPRI1_VPIF_DMA_1_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_MSTPRI1_VPIF_DMA_0_MASK   (0x07000000u)
 
#define CSL_SYSCFG_MSTPRI1_VPIF_DMA_0_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_MSTPRI1_EDMA31TC0_MASK   (0x00070000u)
 
#define CSL_SYSCFG_MSTPRI1_EDMA31TC0_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_MSTPRI1_EDMA30TC1_MASK   (0x00007000u)
 
#define CSL_SYSCFG_MSTPRI1_EDMA30TC1_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_MSTPRI1_EDMA30TC1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI1_EDMA30TC0_MASK   (0x00000700u)
 
#define CSL_SYSCFG_MSTPRI1_EDMA30TC0_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_MSTPRI1_EDMA30TC0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI1_PRU1_MASK   (0x00000070u)
 
#define CSL_SYSCFG_MSTPRI1_PRU1_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_MSTPRI1_PRU1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI1_PRU0_MASK   (0x00000007u)
 
#define CSL_SYSCFG_MSTPRI1_PRU0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI1_PRU0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI2_LCDC_MASK   (0x70000000u)
 
#define CSL_SYSCFG_MSTPRI2_LCDC_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_MSTPRI2_USB1_MASK   (0x07000000u)
 
#define CSL_SYSCFG_MSTPRI2_USB1_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_MSTPRI2_UHPI_MASK   (0x00700000u)
 
#define CSL_SYSCFG_MSTPRI2_UHPI_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_MSTPRI2_USB0CDMA_MASK   (0x00007000u)
 
#define CSL_SYSCFG_MSTPRI2_USB0CDMA_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_MSTPRI2_USB0CFG_MASK   (0x00000700u)
 
#define CSL_SYSCFG_MSTPRI2_USB0CFG_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_MSTPRI2_EMAC_MASK   (0x00000007u)
 
#define CSL_SYSCFG_MSTPRI2_EMAC_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_MSTPRI2_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_RESERVED1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_ALARM   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_UART2_CTS   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_GPIO0_8   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_AMUTE0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_PRU0_R30_16   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_UART2_RTS   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_GPIO0_9   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_AHCLKX0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_USB_REFCLKIN   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_UART1_CTS   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_GPIO0_10   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_AHCLKR0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_PRU0_R30_18   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_UART1_RTS   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_GPIO0_11   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_AFSX0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_OBSERVE0_LOS   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_GPIO0_12   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_AFSR0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_OBSERVE0_SYNC   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_GPIO0_13   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_ACLKX0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_PRU0_R30_19   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_GPIO0_14   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_ACLKR0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_PRU0_R30_20   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_GPIO0_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_AXR0_8   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_CLKS1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_ECAP1   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_GPIO0_0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_AXR0_9   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_DX1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_OBSERVE0_PHY_STATE2   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_GPIO0_1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_AXR0_10   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_DR1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_OBSERVE0_PHY_STATE1   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_GPIO0_2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_AXR0_11   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_FSX1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_OBSERVE0_PHY_STATE0   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_GPIO0_3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_AXR0_12   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_FSR1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_OBSERVE0_PHY_READY   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_GPIO0_4   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_AXR0_13   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_CLKX1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_OBSERVE0_COMINIT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_GPIO0_5   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_AXR0_14   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_CLKR1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_OBSERVE0_COMWAKE   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_GPIO0_6   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_AXR0_15   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_EPWM0TZ0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_ECAP2   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_GPIO0_7   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_AXR0_0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_ECAP0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_GPIO8_7   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_MII_TXD0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_AXR0_1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_DX0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_GPIO1_9   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_MII_TXD1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_AXR0_2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_DR0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_GPIO1_10   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_MII_TXD2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_AXR0_3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_FSX0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_GPIO1_11   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_MII_TXD3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_AXR0_4   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_FSR0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_GPIO1_12   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_MII_COL   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_AXR0_5   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_CLKX0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_GPIO1_13   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_MII_TXCLK   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_AXR0_6   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_CLKR0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_GPIO1_14   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_MII_TXEN   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_AXR0_7   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_EPWM1TZ0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_PRU0_R30_17   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_GPIO1_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX2_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_NSPI0_SCS2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_UART0_RTS   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_GPIO8_1   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_MII_RXD0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_NSPI0_SCS3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_UART0_CTS   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_GPIO8_2   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_MII_RXD1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_NSPI0_SCS4   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_UART0_TXD   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_GPIO8_3   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_MII_RXD2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_NSPI0_SCS5   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_UART0_RXD   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_GPIO8_4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_MII_RXD3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_SPI0_SIMO0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_EPWMSYNCO   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_GPIO8_5   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_MII_CRS   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_SPI0_SOMI0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_EPWMSYNCI   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_GPIO8_6   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_MII_RXER   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_NSPI0_ENA   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_EPWM0B   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_PRU0_R30_6   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_MII_RXDV   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_SPI0_CLK   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_EPWM0A   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_GPIO1_8   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_MII_RXCLK   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX3_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_NSPI1_SCS2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_UART1_TXD   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_CP_POD   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_GPIO1_0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_NSPI1_SCS3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_UART1_RXD   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_LED   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_GPIO1_1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_NSPI1_SCS4   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_UART2_TXD   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_I2C1_SDA   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_GPIO1_2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_NSPI1_SCS5   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_UART2_RXD   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_I2C1_SCL   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_GPIO1_3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_NSPI1_SCS6   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_I2C0_SDA   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_TM64P3_OUT12   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_GPIO1_4   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_NSPI1_SCS7   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_I2C0_SCL   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_TM64P2_OUT12   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_GPIO1_5   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_NSPI0_SCS0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_TM64P1_OUT12   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_GPIO1_6   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_MDIO_D   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_NSPI0_SCS1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_TM64P0_OUT12   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_GPIO1_7   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_MDIO_CLK   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_EMA_BA0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_GPIO2_8   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_EMA_BA1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_GPIO2_9   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_SPI1_SIMO0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_GPIO2_10   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_SPI1_SOMI0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_GPIO2_11   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_NSPI1_ENA   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_GPIO2_12   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_SPI1_CLK   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_GPIO2_13   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_NSPI1_SCS0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_EPWM1B   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_PRU0_R30_7   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_GPIO2_14   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_NSPI1_SCS1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_EPWM1A   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_PRU0_R30_8   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_GPIO2_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX5_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_NEMA_CS0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_GPIO2_0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_EMA_WAIT1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_PRU0_R30_1   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_GPIO2_1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_NEMA_WE_DQM1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_GPIO2_2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_NEMA_WE_DQM0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_GPIO2_3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_NEMA_CAS   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_PRU0_R30_2   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_GPIO2_4   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_NEMA_RAS   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_PRU0_R30_3   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_GPIO2_5   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_EMA_SDCKE   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_PRU0_R30_4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_GPIO2_6   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_EMA_CLK   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_PRU0_R30_5   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_GPIO2_7   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX6_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_EMA_WAIT0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_PRU0_R30_0   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_GPIO3_8   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_NEMA_RNW   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_GPIO3_9   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_NEMA_OE   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_GPIO3_10   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_NEMA_WE   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_GPIO3_11   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_NEMA_CS5   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_GPIO3_12   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_NEMA_CS4   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_GPIO3_13   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_NEMA_CS3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_GPIO3_14   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_NEMA_CS2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_GPIO3_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX7_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_EMA_D8   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_GPIO3_0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_EMA_D9   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_GPIO3_1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_EMA_D10   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_GPIO3_2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_EMA_D11   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_GPIO3_3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_EMA_D12   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_GPIO3_4   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_EMA_D13   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_GPIO3_5   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_EMA_D14   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_GPIO3_6   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_EMA_D15   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_GPIO3_7   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_EMA_D0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_GPIO4_8   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_EMA_D1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_GPIO4_9   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_EMA_D2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_GPIO4_10   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_EMA_D3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_GPIO4_11   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_EMA_D4   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_GPIO4_12   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_EMA_D5   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_GPIO4_13   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_EMA_D6   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_GPIO4_14   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_EMA_D7   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_GPIO4_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX9_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_EMA_A16   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_MMCSD0_DAT5   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_PRU1_R30_24   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_GPIO4_0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_EMA_A17   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_MMCSD0_DAT4   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_PRU1_R30_25   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_GPIO4_1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_EMA_A18   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_MMCSD0_DAT3   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_PRU1_R30_26   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_GPIO4_2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_EMA_A19   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_MMCSD0_DAT2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_PRU1_R30_27   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_GPIO4_3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_EMA_A20   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_MMCSD0_DAT1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_PRU1_R30_28   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_GPIO4_4   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_EMA_A21   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_MMCSD0_DAT0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_PRU1_R30_29   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_GPIO4_5   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_EMA_A22   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_MMCSD0_CMD   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_PRU1_R30_30   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_GPIO4_6   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_EMA_A23   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_MMCSD0_CLK   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_PRU1_R30_31   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_GPIO4_7   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX10_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_EMA_A8   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_PRU1_R30_16   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_GPIO5_8   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_EMA_A9   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_PRU1_R30_17   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_GPIO5_9   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_EMA_A10   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_PRU1_R30_18   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_GPIO5_10   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_EMA_A11   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_PRU1_R30_19   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_GPIO5_11   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_EMA_A12   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_PRU1_R30_20   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_GPIO5_12   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_EMA_A13   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_PRU0_R30_21   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_PRU1_R30_21   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_GPIO5_13   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_EMA_A14   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_MMCSD0_DAT7   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_PRU1_R30_22   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_GPIO5_14   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_EMA_A15   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_MMCSD0_DAT6   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_PRU1_R30_23   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_GPIO5_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX11_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_EMA_A0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_GPIO5_0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_EMA_A1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_GPIO5_1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_EMA_A2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_GPIO5_2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_EMA_A3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_GPIO5_3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_EMA_A4   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_GPIO5_4   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_EMA_A5   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_GPIO5_5   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_EMA_A6   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_GPIO5_6   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_EMA_A7   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_PRU1_R30_15   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_GPIO5_7   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_PRU0_R30_26   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_UHPI_HRNW   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_CH1_WAIT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_GPIO6_8   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_PRU0_R30_27   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_UHPI_HHWIL   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_CH1_ENABLE   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_GPIO6_9   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_PRU0_R30_28   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_UHPI_HCNTL1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_CH1_START   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_GPIO6_10   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_PRU0_R30_29   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_UHPI_HCNTL0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_CH1_CLK   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_GPIO6_11   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_PRU0_R30_30   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_NUHPI_HINT   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_PRU1_R30_11   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_GPIO6_12   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_PRU0_R30_31   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_NUHPI_HRDY   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_PRU1_R30_12   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_GPIO6_13   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_OBSCLK0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_NUHPI_HDS2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_PRU1_R30_13   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_GPIO6_14   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_NRESETOUT   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_NUHPI_HAS   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_PRU1_R30_14   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_GPIO6_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX13_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_DIN2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_UHPI_HD10   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_UPP_D10   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_RMII_RXER   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_DIN3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_UHPI_HD11   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_UPP_D11   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_RMII_RXD0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_DIN4   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_UHPI_HD12   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_UPP_D12   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_RMII_RXD1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_DIN5   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_UHPI_HD13   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_UPP_D13   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_RMII_TXEN   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_DIN6   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_UHPI_HD14   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_UPP_D14   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_RMII_TXD0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_DIN7   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_UHPI_HD15   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_UPP_D15   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_RMII_TXD1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_CLKIN1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_NUHPI_HDS1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_PRU1_R30_9   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_GPIO6_6   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_CLKIN0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_NUHPI_HCS   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_PRU1_R30_10   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_GPIO6_7   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX14_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_DIN10   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_UHPI_HD2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_UPP_D2   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_PRU0_R30_10   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_DIN11   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_UHPI_HD3   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_UPP_D3   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_PRU0_R30_11   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_DIN12   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_UHPI_HD4   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_UPP_D4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_PRU0_R30_12   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_DIN13_FIELD   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_UHPI_HD5   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_UPP_D5   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_PRU0_R30_13   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_DIN14_HSYNC   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_UHPI_HD6   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_UPP_D6   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_PRU0_R30_14   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_DIN15_VSYNC   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_UHPI_HD7   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_UPP_D7   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_PRU0_R30_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_DIN0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_UHPI_HD8   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_UPP_D8   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_RMII_CRS_DV   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_DIN1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_UHPI_HD9   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_UPP_D9   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_RMII_MHZ_50_CLK   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX15_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_DOUT2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_LCD_D2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_UPP_XD10   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_GPIO7_10   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_DOUT3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_LCD_D3   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_UPP_XD11   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_GPIO7_11   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_DOUT4   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_LCD_D4   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_UPP_XD12   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_GPIO7_12   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_DOUT5   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_LCD_D5   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_UPP_XD13   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_GPIO7_13   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_DOUT6   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_LCD_D6   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_UPP_XD14   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_GPIO7_14   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_DOUT7   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_LCD_D7   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_UPP_XD15   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_GPIO7_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_DIN8   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_UHPI_HD0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_UPP_D0   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_GPIO6_5   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_DIN9   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_UHPI_HD1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_UPP_D1   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_PRU0_R30_9   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_DOUT10   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_LCD_D10   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_UPP_XD2   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_GPIO7_2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_DOUT11   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_LCD_D11   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_UPP_XD3   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_GPIO7_3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_DOUT12   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_LCD_D12   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_UPP_XD4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_GPIO7_4   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_DOUT13   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_LCD_D13   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_UPP_XD5   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_GPIO7_5   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_DOUT14   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_LCD_D14   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_UPP_XD6   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_GPIO7_6   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_DOUT15   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_LCD_D15   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_UPP_XD7   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_GPIO7_7   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_DOUT0   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_LCD_D0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_UPP_XD8   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_GPIO7_8   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_DOUT1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_LCD_D1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_UPP_XD9   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_GPIO7_9   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX17_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_MMCSD1_DAT6   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_LCD_MCLK   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_PRU1_R30_6   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_GPIO8_10   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_MMCSD1_DAT7   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_LCD_PCLK   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_PRU1_R30_7   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_GPIO8_11   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_PRU0_R30_22   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_PRU1_R30_8   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_CH0_WAIT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_GPIO8_12   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_PRU0_R30_23   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_MMCSD1_CMD   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_CH0_ENABLE   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_GPIO8_13   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_PRU0_R30_24   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_MMCSD1_CLK   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_CH0_START   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_GPIO8_14   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_PRU0_R30_25   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_MMCSD1_DAT0   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_CH0_CLK   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_GPIO8_15   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_DOUT8   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_LCD_D8   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_UPP_XD0   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_GPIO7_0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_DOUT9   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_LCD_D9   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_UPP_XD1   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_GPIO7_1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX18_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_MASK   (0xF0000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_RTCK   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_GPIO8_0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_MASK   (0x0F000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_RESERVED1   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_NLCD_AC_ENB_CS   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_RESERVED4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_GPIO6_0   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_MASK   (0x00F00000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_CLKO3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_RESERVED2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_PRU1_R30_0   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_GPIO6_1   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_MASK   (0x000F0000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_CLKIN3   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_MMCSD1_DAT1   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_PRU1_R30_1   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_GPIO6_2   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_MASK   (0x0000F000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_CLKO2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_MMCSD1_DAT2   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_PRU1_R30_2   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_GPIO6_3   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_MASK   (0x00000F00u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_CLKIN2   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_MMCSD1_DAT3   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_PRU1_R30_3   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_GPIO6_4   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_MASK   (0x000000F0u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_MMCSD1_DAT4   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_LCD_VSYNC   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_PRU1_R30_4   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_GPIO8_8   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_DEFAULT   (0x00000000u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_MMCSD1_DAT5   (0x00000001u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_LCD_HSYNC   (0x00000002u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_PRU1_R30_5   (0x00000004u)
 
#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_GPIO8_9   (0x00000008u)
 
#define CSL_SYSCFG_PINMUX19_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_MASK   (0x20000000u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_SHIFT   (0x0000001Du)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_MASK   (0x10000000u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_SHIFT   (0x0000001Cu)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_MASK   (0x08000000u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_SHIFT   (0x0000001Bu)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_MASK   (0x01000000u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_SHIFT   (0x00000018u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_MASK   (0x00800000u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_SHIFT   (0x00000017u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_SPI1SRC_MASK   (0x00400000u)
 
#define CSL_SYSCFG_SUSPSRC_SPI1SRC_SHIFT   (0x00000016u)
 
#define CSL_SYSCFG_SUSPSRC_SPI1SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_SPI1SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_SPI1SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_SPI0SRC_MASK   (0x00200000u)
 
#define CSL_SYSCFG_SUSPSRC_SPI0SRC_SHIFT   (0x00000015u)
 
#define CSL_SYSCFG_SUSPSRC_SPI0SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_SPI0SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_SPI0SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_UART2SRC_MASK   (0x00100000u)
 
#define CSL_SYSCFG_SUSPSRC_UART2SRC_SHIFT   (0x00000014u)
 
#define CSL_SYSCFG_SUSPSRC_UART2SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_UART2SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_UART2SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_UART1SRC_MASK   (0x00080000u)
 
#define CSL_SYSCFG_SUSPSRC_UART1SRC_SHIFT   (0x00000013u)
 
#define CSL_SYSCFG_SUSPSRC_UART1SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_UART1SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_UART1SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_UART0SRC_MASK   (0x00040000u)
 
#define CSL_SYSCFG_SUSPSRC_UART0SRC_SHIFT   (0x00000012u)
 
#define CSL_SYSCFG_SUSPSRC_UART0SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_UART0SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_UART0SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_I2C1SRC_MASK   (0x00020000u)
 
#define CSL_SYSCFG_SUSPSRC_I2C1SRC_SHIFT   (0x00000011u)
 
#define CSL_SYSCFG_SUSPSRC_I2C1SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_I2C1SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_I2C1SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_I2C0SRC_MASK   (0x00010000u)
 
#define CSL_SYSCFG_SUSPSRC_I2C0SRC_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_SUSPSRC_I2C0SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_I2C0SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_I2C0SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_VPIFSRC_MASK   (0x00004000u)
 
#define CSL_SYSCFG_SUSPSRC_VPIFSRC_SHIFT   (0x0000000Eu)
 
#define CSL_SYSCFG_SUSPSRC_VPIFSRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_VPIFSRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_VPIFSRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_SATASRC_MASK   (0x00002000u)
 
#define CSL_SYSCFG_SUSPSRC_SATASRC_SHIFT   (0x0000000Du)
 
#define CSL_SYSCFG_SUSPSRC_SATASRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_SATASRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_SATASRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_HPISRC_MASK   (0x00001000u)
 
#define CSL_SYSCFG_SUSPSRC_HPISRC_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_SUSPSRC_HPISRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_HPISRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_HPISRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_USB0SRC_MASK   (0x00000200u)
 
#define CSL_SYSCFG_SUSPSRC_USB0SRC_SHIFT   (0x00000009u)
 
#define CSL_SYSCFG_SUSPSRC_USB0SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_USB0SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_USB0SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_MASK   (0x00000100u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_MASK   (0x00000080u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_SHIFT   (0x00000007u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_PRUSRC_MASK   (0x00000040u)
 
#define CSL_SYSCFG_SUSPSRC_PRUSRC_SHIFT   (0x00000006u)
 
#define CSL_SYSCFG_SUSPSRC_PRUSRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_PRUSRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_PRUSRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_EMACSRC_MASK   (0x00000020u)
 
#define CSL_SYSCFG_SUSPSRC_EMACSRC_SHIFT   (0x00000005u)
 
#define CSL_SYSCFG_SUSPSRC_EMACSRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_EMACSRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_EMACSRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_UPPSRC_MASK   (0x00000010u)
 
#define CSL_SYSCFG_SUSPSRC_UPPSRC_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_SUSPSRC_UPPSRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_UPPSRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_UPPSRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_MASK   (0x00000008u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_SHIFT   (0x00000003u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_MASK   (0x00000004u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_SHIFT   (0x00000002u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_MASK   (0x00000002u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_SHIFT   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_MASK   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_ARM   (0x00000000u)
 
#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_DSP   (0x00000001u)
 
#define CSL_SYSCFG_SUSPSRC_RESETVAL   (0x7BFFF7FFu)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_MASK   (0x00000010u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_ASSERT   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_MASK   (0x00000008u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_SHIFT   (0x00000003u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_ASSERT   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_MASK   (0x00000004u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_SHIFT   (0x00000002u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_ASSERT   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_MASK   (0x00000002u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_SHIFT   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_ASSERT   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_MASK   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_ASSERT   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_MASK   (0x00000010u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_CLEAR   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_MASK   (0x00000008u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_SHIFT   (0x00000003u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_CLEAR   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_MASK   (0x00000004u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_SHIFT   (0x00000002u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_CLEAR   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_MASK   (0x00000002u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_SHIFT   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_CLEAR   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_MASK   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_NOTHING   (0x00000000u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_CLEAR   (0x00000001u)
 
#define CSL_SYSCFG_CHIPSIG_CLR_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_ARM_CLK_DIS0_MASK   (0x80000000u)
 
#define CSL_SYSCFG_CFGCHIP0_ARM_CLK_DIS0_SHIFT   (0x0000001Fu)
 
#define CSL_SYSCFG_CFGCHIP0_ARM_CLK_DIS0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_ARM_TAP_DIS0_MASK   (0x40000000u)
 
#define CSL_SYSCFG_CFGCHIP0_ARM_TAP_DIS0_SHIFT   (0x0000001Eu)
 
#define CSL_SYSCFG_CFGCHIP0_ARM_TAP_DIS0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_MASK   (0x00000010u)
 
#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_FREE   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_LOCK   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_MASK   (0x0000000Cu)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_SHIFT   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_16BYTE   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_32BYTE   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_64BYTE   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_RESERVED   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_MASK   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_16BYTE   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_32BYTE   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_64BYTE   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_RESERVED   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MASK   (0xF8000000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_SHIFT   (0x0000001Bu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_ECAP2   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP0_TXDMA   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP0_RXDMA   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP1_TXDMA   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP1_RXDMA   (0x00000004u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP2_TXDMA   (0x00000005u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP2_RXDMA   (0x00000006u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C0_RXTHPLSEINT   (0x00000007u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C0_RXPLSEINT   (0x00000008u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C0_TXPLSEINT   (0x00000009u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C0_MISCINT   (0x0000000au)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C1_RXTHPLSEINT   (0x0000000bu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C1_RXPLSEINT   (0x0000000cu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C1_TXPLSEINT   (0x0000000du)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C1_MISCINT   (0x0000000eu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C2_RXTHPLSEINT   (0x0000000fu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C2_RXPLSEINT   (0x00000010u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C2_TXPLSEINT   (0x00000011u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C2_MISCINT   (0x00000012u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MASK   (0x07C00000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_SHIFT   (0x00000016u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_ECAP1   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP0_TXDMA   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP0_RXDMA   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP1_TXDMA   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP1_RXDMA   (0x00000004u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP2_TXDMA   (0x00000005u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP2_RXDMA   (0x00000006u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C0_RXTHPLSEINT   (0x00000007u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C0_RXPLSEINT   (0x00000008u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C0_TXPLSEINT   (0x00000009u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C0_MISCINT   (0x0000000au)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C1_RXTHPLSEINT   (0x0000000bu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C1_RXPLSEINT   (0x0000000cu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C1_TXPLSEINT   (0x0000000du)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C1_MISCINT   (0x0000000eu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C2_RXTHPLSEINT   (0x0000000fu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C2_RXPLSEINT   (0x00000010u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C2_TXPLSEINT   (0x00000011u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C2_MISCINT   (0x00000012u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MASK   (0x003E0000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_SHIFT   (0x00000011u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_ECAP0   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP0_TXDMA   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP0_RXDMA   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP1_TXDMA   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP1_RXDMA   (0x00000004u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP2_TXDMA   (0x00000005u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP2_RXDMA   (0x00000006u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C0_RXTHPLSEINT   (0x00000007u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C0_RXPLSEINT   (0x00000008u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C0_TXPLSEINT   (0x00000009u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C0_MISCINT   (0x0000000au)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C1_RXTHPLSEINT   (0x0000000bu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C1_RXPLSEINT   (0x0000000cu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C1_TXPLSEINT   (0x0000000du)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C1_MISCINT   (0x0000000eu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C2_RXTHPLSEINT   (0x0000000fu)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C2_RXPLSEINT   (0x00000010u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C2_TXPLSEINT   (0x00000011u)
 
#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C2_MISCINT   (0x00000012u)
 
#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_MASK   (0x00010000u)
 
#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_WORDADDR   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_BYTEADDR   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP1_HPIENA_MASK   (0x00008000u)
 
#define CSL_SYSCFG_CFGCHIP1_HPIENA_SHIFT   (0x0000000Fu)
 
#define CSL_SYSCFG_CFGCHIP1_HPIENA_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_HPIENA_DISABLE   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_HPIENA_ENABLE   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_MASK   (0x00006000u)
 
#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_SHIFT   (0x0000000Du)
 
#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_16BYTE   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_32BYTE   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_64BYTE   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_RESERVED   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_MASK   (0x00001000u)
 
#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_STOP   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_ENABLE   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_LOW   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B0   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B1   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B2   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B3   (0x00000004u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B4   (0x00000005u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B5   (0x00000006u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B6   (0x00000007u)
 
#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B7   (0x00000008u)
 
#define CSL_SYSCFG_CFGCHIP1_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKGD_MASK   (0x00020000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKGD_SHIFT   (0x00000011u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKGD_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0VBUSSENSE_MASK   (0x00010000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0VBUSSENSE_SHIFT   (0x00000010u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0VBUSSENSE_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_RESET_MASK   (0x00008000u)
 
#define CSL_SYSCFG_CFGCHIP2_RESET_SHIFT   (0x0000000Fu)
 
#define CSL_SYSCFG_CFGCHIP2_RESET_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_MASK   (0x00006000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_SHIFT   (0x0000000Du)
 
#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_PHY   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_USB_HOST   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_USB_DEVICE   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_USB_HOST_LOW   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_MASK   (0x00001000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_SHIFT   (0x0000000Cu)
 
#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_USBCLK   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_EXTCLK   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_MASK   (0x00000800u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_SHIFT   (0x0000000Bu)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_INTCLK   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_EXTCLK   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYPWDN_MASK   (0x00000400u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYPWDN_SHIFT   (0x0000000Au)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHYPWDN_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0OTGPWRDN_MASK   (0x00000200u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0OTGPWRDN_SHIFT   (0x00000009u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0OTGPWRDN_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0DATPOL_MASK   (0x00000100u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0DATPOL_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0DATPOL_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_MASK   (0x00000080u)
 
#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_SHIFT   (0x00000007u)
 
#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_DISABLED   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_ENABLED   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHY_PLLON_MASK   (0x00000040u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHY_PLLON_SHIFT   (0x00000006u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0PHY_PLLON_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0SESNDEN_MASK   (0x00000020u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0SESNDEN_SHIFT   (0x00000005u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0SESNDEN_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0VBDTCTEN_MASK   (0x00000010u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0VBDTCTEN_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0VBDTCTEN_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0REF_FREQ_MASK   (0x0000000Fu)
 
#define CSL_SYSCFG_CFGCHIP2_USB0REF_FREQ_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_USB0REF_FREQ_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP2_RESETVAL   (0x00008F00u)
 
#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_MASK   (0x00000100u)
 
#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_SHIFT   (0x00000008u)
 
#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_RESETVAL   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_MII   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_RMII   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_MASK   (0x00000040u)
 
#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_SHIFT   (0x00000006u)
 
#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_ASYNC3   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_TXCLK   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_MASK   (0x00000020u)
 
#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_SHIFT   (0x00000005u)
 
#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_FREE   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_LOCK   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_MASK   (0x00000010u)
 
#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_SHIFT   (0x00000004u)
 
#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_PLL0   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_PLL1   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_MASK   (0x00000008u)
 
#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_SHIFT   (0x00000003u)
 
#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_NORMAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_ALTERNATE   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_MASK   (0x00000004u)
 
#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_SHIFT   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_DISABLE   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_ENABLE   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_MASK   (0x00000002u)
 
#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_SHIFT   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_PLLCTRL_SYSCLK3   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_4P5_PLL   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP3_RESETVAL   (0x00000100u)
 
#define CSL_SYSCFG_CFGCHIP4_AMUTECLR0_MASK   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP4_AMUTECLR0_SHIFT   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP4_AMUTECLR0_RESETVAL   (0x00000000u)
 
#define CSL_SYSCFG_CFGCHIP4_AMUTECLR0_CLEAR   (0x00000001u)
 
#define CSL_SYSCFG_CFGCHIP4_RESETVAL   (0x00000100u)
 

Typedefs

typedef volatile CSL_SyscfgRegs * CSL_SyscfgRegsOvly
 

Macro Definition Documentation

#define CSL_SYSCFG_BOOTCFG_BOOTMODE_MASK   (0x0000FFFFu)

Definition at line 152 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_BOOTCFG_BOOTMODE_RESETVAL   (0x00000000u)

Definition at line 154 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_BOOTCFG_BOOTMODE_SHIFT   (0x00000000u)

Definition at line 153 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_BOOTCFG_RESETVAL   (0x00000000u)

Definition at line 156 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_BOOTCFG_SMARTRFLX_MASK   (0x0FFF0000u)

Definition at line 148 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_BOOTCFG_SMARTRFLX_RESETVAL   (0x00000000u)

Definition at line 150 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_BOOTCFG_SMARTRFLX_SHIFT   (0x00000010u)

Definition at line 149 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_ARM_CLK_DIS0_MASK   (0x80000000u)

Definition at line 2330 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_ARM_CLK_DIS0_RESETVAL   (0x00000000u)

Definition at line 2332 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_ARM_CLK_DIS0_SHIFT   (0x0000001Fu)

Definition at line 2331 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_ARM_TAP_DIS0_MASK   (0x40000000u)

Definition at line 2334 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_ARM_TAP_DIS0_RESETVAL   (0x00000000u)

Definition at line 2336 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_ARM_TAP_DIS0_SHIFT   (0x0000001Eu)

Definition at line 2335 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_16BYTE   (0x00000000u)

Definition at line 2358 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_32BYTE   (0x00000001u)

Definition at line 2359 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_64BYTE   (0x00000002u)

Definition at line 2360 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_MASK   (0x00000003u)

Definition at line 2354 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_RESERVED   (0x00000003u)

Definition at line 2361 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_RESETVAL   (0x00000000u)

Definition at line 2356 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC0DBS_SHIFT   (0x00000000u)

Definition at line 2355 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_16BYTE   (0x00000000u)

Definition at line 2349 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_32BYTE   (0x00000001u)

Definition at line 2350 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_64BYTE   (0x00000002u)

Definition at line 2351 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_MASK   (0x0000000Cu)

Definition at line 2345 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_RESERVED   (0x00000003u)

Definition at line 2352 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_RESETVAL   (0x00000000u)

Definition at line 2347 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_EDMA30TC1DBS_SHIFT   (0x00000002u)

Definition at line 2346 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_FREE   (0x00000000u)

Definition at line 2342 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_LOCK   (0x00000001u)

Definition at line 2343 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_MASK   (0x00000010u)

Definition at line 2338 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_RESETVAL   (0x00000000u)

Definition at line 2340 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_PLL_MASTER_LOCK_SHIFT   (0x00000004u)

Definition at line 2339 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP0_RESETVAL   (0x00000000u)

Definition at line 2363 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B0   (0x00000001u)

Definition at line 2474 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B1   (0x00000002u)

Definition at line 2475 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B2   (0x00000003u)

Definition at line 2476 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B3   (0x00000004u)

Definition at line 2477 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B4   (0x00000005u)

Definition at line 2478 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B5   (0x00000006u)

Definition at line 2479 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B6   (0x00000007u)

Definition at line 2480 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_GPIO_B7   (0x00000008u)

Definition at line 2481 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_LOW   (0x00000000u)

Definition at line 2473 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_MASK   (0x0000000Fu)

Definition at line 2469 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_RESETVAL   (0x00000000u)

Definition at line 2471 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_AMUTESEL0_SHIFT   (0x00000000u)

Definition at line 2470 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_ECAP0   (0x00000000u)

Definition at line 2419 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C0_MISCINT   (0x0000000au)

Definition at line 2429 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C0_RXPLSEINT   (0x00000008u)

Definition at line 2427 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C0_RXTHPLSEINT   (0x00000007u)

Definition at line 2426 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C0_TXPLSEINT   (0x00000009u)

Definition at line 2428 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C1_MISCINT   (0x0000000eu)

Definition at line 2433 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C1_RXPLSEINT   (0x0000000cu)

Definition at line 2431 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C1_RXTHPLSEINT   (0x0000000bu)

Definition at line 2430 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C1_TXPLSEINT   (0x0000000du)

Definition at line 2432 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C2_MISCINT   (0x00000012u)

Definition at line 2437 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C2_RXPLSEINT   (0x00000010u)

Definition at line 2435 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C2_RXTHPLSEINT   (0x0000000fu)

Definition at line 2434 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_EMAC_C2_TXPLSEINT   (0x00000011u)

Definition at line 2436 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MASK   (0x003E0000u)

Definition at line 2415 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP0_RXDMA   (0x00000002u)

Definition at line 2421 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP0_TXDMA   (0x00000001u)

Definition at line 2420 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP1_RXDMA   (0x00000004u)

Definition at line 2423 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP1_TXDMA   (0x00000003u)

Definition at line 2422 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP2_RXDMA   (0x00000006u)

Definition at line 2425 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_MCASP2_TXDMA   (0x00000005u)

Definition at line 2424 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_RESETVAL   (0x00000000u)

Definition at line 2417 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP0SRC_SHIFT   (0x00000011u)

Definition at line 2416 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_ECAP1   (0x00000000u)

Definition at line 2395 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C0_MISCINT   (0x0000000au)

Definition at line 2405 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C0_RXPLSEINT   (0x00000008u)

Definition at line 2403 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C0_RXTHPLSEINT   (0x00000007u)

Definition at line 2402 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C0_TXPLSEINT   (0x00000009u)

Definition at line 2404 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C1_MISCINT   (0x0000000eu)

Definition at line 2409 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C1_RXPLSEINT   (0x0000000cu)

Definition at line 2407 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C1_RXTHPLSEINT   (0x0000000bu)

Definition at line 2406 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C1_TXPLSEINT   (0x0000000du)

Definition at line 2408 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C2_MISCINT   (0x00000012u)

Definition at line 2413 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C2_RXPLSEINT   (0x00000010u)

Definition at line 2411 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C2_RXTHPLSEINT   (0x0000000fu)

Definition at line 2410 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_EMAC_C2_TXPLSEINT   (0x00000011u)

Definition at line 2412 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MASK   (0x07C00000u)

Definition at line 2391 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP0_RXDMA   (0x00000002u)

Definition at line 2397 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP0_TXDMA   (0x00000001u)

Definition at line 2396 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP1_RXDMA   (0x00000004u)

Definition at line 2399 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP1_TXDMA   (0x00000003u)

Definition at line 2398 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP2_RXDMA   (0x00000006u)

Definition at line 2401 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_MCASP2_TXDMA   (0x00000005u)

Definition at line 2400 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_RESETVAL   (0x00000000u)

Definition at line 2393 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP1SRC_SHIFT   (0x00000016u)

Definition at line 2392 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_ECAP2   (0x00000000u)

Definition at line 2371 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C0_MISCINT   (0x0000000au)

Definition at line 2381 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C0_RXPLSEINT   (0x00000008u)

Definition at line 2379 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C0_RXTHPLSEINT   (0x00000007u)

Definition at line 2378 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C0_TXPLSEINT   (0x00000009u)

Definition at line 2380 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C1_MISCINT   (0x0000000eu)

Definition at line 2385 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C1_RXPLSEINT   (0x0000000cu)

Definition at line 2383 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C1_RXTHPLSEINT   (0x0000000bu)

Definition at line 2382 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C1_TXPLSEINT   (0x0000000du)

Definition at line 2384 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C2_MISCINT   (0x00000012u)

Definition at line 2389 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C2_RXPLSEINT   (0x00000010u)

Definition at line 2387 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C2_RXTHPLSEINT   (0x0000000fu)

Definition at line 2386 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_EMAC_C2_TXPLSEINT   (0x00000011u)

Definition at line 2388 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MASK   (0xF8000000u)

Definition at line 2367 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP0_RXDMA   (0x00000002u)

Definition at line 2373 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP0_TXDMA   (0x00000001u)

Definition at line 2372 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP1_RXDMA   (0x00000004u)

Definition at line 2375 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP1_TXDMA   (0x00000003u)

Definition at line 2374 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP2_RXDMA   (0x00000006u)

Definition at line 2377 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_MCASP2_TXDMA   (0x00000005u)

Definition at line 2376 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_RESETVAL   (0x00000000u)

Definition at line 2369 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_CAP2SRC_SHIFT   (0x0000001Bu)

Definition at line 2368 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_16BYTE   (0x00000000u)

Definition at line 2457 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_32BYTE   (0x00000001u)

Definition at line 2458 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_64BYTE   (0x00000002u)

Definition at line 2459 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_MASK   (0x00006000u)

Definition at line 2453 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_RESERVED   (0x00000003u)

Definition at line 2460 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_RESETVAL   (0x00000000u)

Definition at line 2455 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_EDMA31TC0DBS_SHIFT   (0x0000000Du)

Definition at line 2454 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_BYTEADDR   (0x00000001u)

Definition at line 2444 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_MASK   (0x00010000u)

Definition at line 2439 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_RESETVAL   (0x00000000u)

Definition at line 2441 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_SHIFT   (0x00000010u)

Definition at line 2440 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIBYTEAD_WORDADDR   (0x00000000u)

Definition at line 2443 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIENA_DISABLE   (0x00000000u)

Definition at line 2450 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIENA_ENABLE   (0x00000001u)

Definition at line 2451 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIENA_MASK   (0x00008000u)

Definition at line 2446 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIENA_RESETVAL   (0x00000000u)

Definition at line 2448 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_HPIENA_SHIFT   (0x0000000Fu)

Definition at line 2447 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_RESETVAL   (0x00000000u)

Definition at line 2483 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_ENABLE   (0x00000001u)

Definition at line 2467 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_MASK   (0x00001000u)

Definition at line 2462 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_RESETVAL   (0x00000000u)

Definition at line 2464 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_SHIFT   (0x0000000Cu)

Definition at line 2463 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP1_TBCLKSYNC_STOP   (0x00000000u)

Definition at line 2466 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_RESET_MASK   (0x00008000u)

Definition at line 2495 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_RESET_RESETVAL   (0x00000001u)

Definition at line 2497 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_RESET_SHIFT   (0x0000000Fu)

Definition at line 2496 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_RESETVAL   (0x00008F00u)

Definition at line 2556 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0DATPOL_MASK   (0x00000100u)

Definition at line 2529 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0DATPOL_RESETVAL   (0x00000001u)

Definition at line 2531 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0DATPOL_SHIFT   (0x00000008u)

Definition at line 2530 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_MASK   (0x00006000u)

Definition at line 2499 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_PHY   (0x00000000u)

Definition at line 2502 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_SHIFT   (0x0000000Du)

Definition at line 2500 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_USB_DEVICE   (0x00000002u)

Definition at line 2504 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_USB_HOST   (0x00000001u)

Definition at line 2503 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_USB_HOST_LOW   (0x00000003u)

Definition at line 2505 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0OTGPWRDN_MASK   (0x00000200u)

Definition at line 2525 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0OTGPWRDN_RESETVAL   (0x00000001u)

Definition at line 2527 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0OTGPWRDN_SHIFT   (0x00000009u)

Definition at line 2526 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHY_PLLON_MASK   (0x00000040u)

Definition at line 2540 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHY_PLLON_RESETVAL   (0x00000000u)

Definition at line 2542 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHY_PLLON_SHIFT   (0x00000006u)

Definition at line 2541 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKGD_MASK   (0x00020000u)

Definition at line 2487 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKGD_RESETVAL   (0x00000000u)

Definition at line 2489 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKGD_SHIFT   (0x00000011u)

Definition at line 2488 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_EXTCLK   (0x00000001u)

Definition at line 2519 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_INTCLK   (0x00000000u)

Definition at line 2518 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_MASK   (0x00000800u)

Definition at line 2514 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_RESETVAL   (0x00000001u)

Definition at line 2516 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_SHIFT   (0x0000000Bu)

Definition at line 2515 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYPWDN_MASK   (0x00000400u)

Definition at line 2521 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYPWDN_RESETVAL   (0x00000001u)

Definition at line 2523 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0PHYPWDN_SHIFT   (0x0000000Au)

Definition at line 2522 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0REF_FREQ_MASK   (0x0000000Fu)

Definition at line 2552 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0REF_FREQ_RESETVAL   (0x00000000u)

Definition at line 2554 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0REF_FREQ_SHIFT   (0x00000000u)

Definition at line 2553 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0SESNDEN_MASK   (0x00000020u)

Definition at line 2544 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0SESNDEN_RESETVAL   (0x00000000u)

Definition at line 2546 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0SESNDEN_SHIFT   (0x00000005u)

Definition at line 2545 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0VBDTCTEN_MASK   (0x00000010u)

Definition at line 2548 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0VBDTCTEN_RESETVAL   (0x00000000u)

Definition at line 2550 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0VBDTCTEN_SHIFT   (0x00000004u)

Definition at line 2549 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0VBUSSENSE_MASK   (0x00010000u)

Definition at line 2491 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0VBUSSENSE_RESETVAL   (0x00000000u)

Definition at line 2493 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB0VBUSSENSE_SHIFT   (0x00000010u)

Definition at line 2492 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_EXTCLK   (0x00000001u)

Definition at line 2512 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_MASK   (0x00001000u)

Definition at line 2507 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_RESETVAL   (0x00000000u)

Definition at line 2509 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_SHIFT   (0x0000000Cu)

Definition at line 2508 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1PHYCLKMUX_USBCLK   (0x00000000u)

Definition at line 2511 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_DISABLED   (0x00000000u)

Definition at line 2537 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_ENABLED   (0x00000001u)

Definition at line 2538 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_MASK   (0x00000080u)

Definition at line 2533 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_RESETVAL   (0x00000000u)

Definition at line 2535 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP2_USB1SUSPENDM_SHIFT   (0x00000007u)

Definition at line 2534 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_MASK   (0x00000010u)

Definition at line 2581 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_PLL0   (0x00000000u)

Definition at line 2585 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_PLL1   (0x00000001u)

Definition at line 2586 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_RESETVAL   (0x00000000u)

Definition at line 2583 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_ASYNC3_CLKSRC_SHIFT   (0x00000004u)

Definition at line 2582 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_DISABLE   (0x00000000u)

Definition at line 2599 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_ENABLE   (0x00000001u)

Definition at line 2600 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_MASK   (0x00000004u)

Definition at line 2595 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_RESETVAL   (0x00000000u)

Definition at line 2597 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_DIV4P5ENA_SHIFT   (0x00000002u)

Definition at line 2596 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_4P5_PLL   (0x00000001u)

Definition at line 2607 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_MASK   (0x00000002u)

Definition at line 2602 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_PLLCTRL_SYSCLK3   (0x00000000u)

Definition at line 2606 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_RESETVAL   (0x00000000u)

Definition at line 2604 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_EMA_CLKSRC_SHIFT   (0x00000001u)

Definition at line 2603 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_FREE   (0x00000000u)

Definition at line 2578 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_LOCK   (0x00000001u)

Definition at line 2579 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_MASK   (0x00000020u)

Definition at line 2574 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_RESETVAL   (0x00000000u)

Definition at line 2576 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PLL1_MASTER_LOCK_SHIFT   (0x00000005u)

Definition at line 2575 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_ALTERNATE   (0x00000001u)

Definition at line 2593 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_MASK   (0x00000008u)

Definition at line 2588 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_NORMAL   (0x00000000u)

Definition at line 2592 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_RESETVAL   (0x00000000u)

Definition at line 2590 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_PRUEVTSEL_SHIFT   (0x00000003u)

Definition at line 2589 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_RESETVAL   (0x00000100u)

Definition at line 2609 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_MASK   (0x00000100u)

Definition at line 2560 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_MII   (0x00000000u)

Definition at line 2564 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_RESETVAL   (0x00000001u)

Definition at line 2562 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_RMII   (0x00000001u)

Definition at line 2565 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_RMII_SEL_SHIFT   (0x00000008u)

Definition at line 2561 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_ASYNC3   (0x00000000u)

Definition at line 2571 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_MASK   (0x00000040u)

Definition at line 2567 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_RESETVAL   (0x00000000u)

Definition at line 2569 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_SHIFT   (0x00000006u)

Definition at line 2568 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP3_UPP_TX_CLKSRC_TXCLK   (0x00000001u)

Definition at line 2572 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP4_AMUTECLR0_CLEAR   (0x00000001u)

Definition at line 2617 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP4_AMUTECLR0_MASK   (0x00000001u)

Definition at line 2613 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP4_AMUTECLR0_RESETVAL   (0x00000000u)

Definition at line 2615 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP4_AMUTECLR0_SHIFT   (0x00000000u)

Definition at line 2614 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CFGCHIP4_RESETVAL   (0x00000100u)

Definition at line 2619 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPREVIDR_CHIPREVID_MASK   (0x0000003Fu)

Definition at line 160 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPREVIDR_CHIPREVID_RESETVAL   (0x00000000u)

Definition at line 162 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPREVIDR_CHIPREVID_SHIFT   (0x00000000u)

Definition at line 161 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPREVIDR_RESETVAL   (0x00000000u)

Definition at line 164 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_ASSERT   (0x00000001u)

Definition at line 2285 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_MASK   (0x00000001u)

Definition at line 2280 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_NOTHING   (0x00000000u)

Definition at line 2284 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_RESETVAL   (0x00000000u)

Definition at line 2282 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG0_SHIFT   (0x00000000u)

Definition at line 2281 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_ASSERT   (0x00000001u)

Definition at line 2278 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_MASK   (0x00000002u)

Definition at line 2273 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_NOTHING   (0x00000000u)

Definition at line 2277 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_RESETVAL   (0x00000000u)

Definition at line 2275 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG1_SHIFT   (0x00000001u)

Definition at line 2274 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_ASSERT   (0x00000001u)

Definition at line 2271 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_MASK   (0x00000004u)

Definition at line 2266 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_NOTHING   (0x00000000u)

Definition at line 2270 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_RESETVAL   (0x00000000u)

Definition at line 2268 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG2_SHIFT   (0x00000002u)

Definition at line 2267 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_ASSERT   (0x00000001u)

Definition at line 2264 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_MASK   (0x00000008u)

Definition at line 2259 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_NOTHING   (0x00000000u)

Definition at line 2263 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_RESETVAL   (0x00000000u)

Definition at line 2261 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG3_SHIFT   (0x00000003u)

Definition at line 2260 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_ASSERT   (0x00000001u)

Definition at line 2257 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_MASK   (0x00000010u)

Definition at line 2252 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_NOTHING   (0x00000000u)

Definition at line 2256 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_RESETVAL   (0x00000000u)

Definition at line 2254 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CHIPSIG4_SHIFT   (0x00000004u)

Definition at line 2253 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_CLEAR   (0x00000001u)

Definition at line 2324 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_MASK   (0x00000001u)

Definition at line 2319 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_NOTHING   (0x00000000u)

Definition at line 2323 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_RESETVAL   (0x00000000u)

Definition at line 2321 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG0_SHIFT   (0x00000000u)

Definition at line 2320 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_CLEAR   (0x00000001u)

Definition at line 2317 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_MASK   (0x00000002u)

Definition at line 2312 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_NOTHING   (0x00000000u)

Definition at line 2316 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_RESETVAL   (0x00000000u)

Definition at line 2314 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG1_SHIFT   (0x00000001u)

Definition at line 2313 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_CLEAR   (0x00000001u)

Definition at line 2310 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_MASK   (0x00000004u)

Definition at line 2305 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_NOTHING   (0x00000000u)

Definition at line 2309 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_RESETVAL   (0x00000000u)

Definition at line 2307 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG2_SHIFT   (0x00000002u)

Definition at line 2306 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_CLEAR   (0x00000001u)

Definition at line 2303 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_MASK   (0x00000008u)

Definition at line 2298 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_NOTHING   (0x00000000u)

Definition at line 2302 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_RESETVAL   (0x00000000u)

Definition at line 2300 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG3_SHIFT   (0x00000003u)

Definition at line 2299 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_CLEAR   (0x00000001u)

Definition at line 2296 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_MASK   (0x00000010u)

Definition at line 2291 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_NOTHING   (0x00000000u)

Definition at line 2295 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_RESETVAL   (0x00000000u)

Definition at line 2293 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_CHIPSIG4_SHIFT   (0x00000004u)

Definition at line 2292 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_CLR_RESETVAL   (0x00000000u)

Definition at line 2326 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_CHIPSIG_RESETVAL   (0x00000000u)

Definition at line 2287 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DEVIDR0_DEVID0_MASK   (0xFFFFFFFFu)

Definition at line 140 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DEVIDR0_DEVID0_RESETVAL   (0x00000000u)

Definition at line 142 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DEVIDR0_DEVID0_SHIFT   (0x00000000u)

Definition at line 141 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DEVIDR0_RESETVAL   (0x00000000u)

Definition at line 144 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR0_DIEID0_MASK   (0xFFFFFFFFu)

Definition at line 108 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR0_DIEID0_RESETVAL   (0x00000000u)

Definition at line 110 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR0_DIEID0_SHIFT   (0x00000000u)

Definition at line 109 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR0_RESETVAL   (0x00000000u)

Definition at line 112 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR1_DIEID1_MASK   (0xFFFFFFFFu)

Definition at line 116 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR1_DIEID1_RESETVAL   (0x00000000u)

Definition at line 118 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR1_DIEID1_SHIFT   (0x00000000u)

Definition at line 117 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR1_RESETVAL   (0x00000000u)

Definition at line 120 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR2_DIEID2_MASK   (0xFFFFFFFFu)

Definition at line 124 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR2_DIEID2_RESETVAL   (0x00000000u)

Definition at line 126 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR2_DIEID2_SHIFT   (0x00000000u)

Definition at line 125 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR2_RESETVAL   (0x00000000u)

Definition at line 128 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR3_DIEID3_MASK   (0xFFFFFFFFu)

Definition at line 132 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR3_DIEID3_RESETVAL   (0x00000000u)

Definition at line 134 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR3_DIEID3_SHIFT   (0x00000000u)

Definition at line 133 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_DIEIDR3_RESETVAL   (0x00000000u)

Definition at line 136 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_EOI_EOIVECT_MASK   (0x000000FFu)

Definition at line 272 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_EOI_EOIVECT_RESETVAL   (0x00000000u)

Definition at line 274 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_EOI_EOIVECT_SHIFT   (0x00000000u)

Definition at line 273 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_EOI_RESETVAL   (0x00000000u)

Definition at line 276 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTADDRR_FLTADDR_MASK   (0xFFFFFFFFu)

Definition at line 280 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTADDRR_FLTADDR_RESETVAL   (0x00000000u)

Definition at line 282 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTADDRR_FLTADDR_SHIFT   (0x00000000u)

Definition at line 281 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTADDRR_RESETVAL   (0x00000000u)

Definition at line 284 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_ID_MASK   (0xFF000000u)

Definition at line 288 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_ID_RESETVAL   (0x00000000u)

Definition at line 290 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_ID_SHIFT   (0x00000018u)

Definition at line 289 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_MSTID_MASK   (0x00FF0000u)

Definition at line 292 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_MSTID_RESETVAL   (0x00000000u)

Definition at line 294 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_MSTID_SHIFT   (0x00000010u)

Definition at line 293 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_NOSECACC_MASK   (0x00000080u)

Definition at line 300 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_NOSECACC_RESETVAL   (0x00000000u)

Definition at line 302 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_NOSECACC_SHIFT   (0x00000007u)

Definition at line 301 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_PRIVID_MASK   (0x00001E00u)

Definition at line 296 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_PRIVID_RESETVAL   (0x00000000u)

Definition at line 298 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_PRIVID_SHIFT   (0x00000009u)

Definition at line 297 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_RESETVAL   (0x00000000u)

Definition at line 316 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_MASK   (0x0000003Fu)

Definition at line 304 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_NOFLT   (0x00000000u)

Definition at line 308 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_RESETVAL   (0x00000000u)

Definition at line 306 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_SHIFT   (0x00000000u)

Definition at line 305 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_SPREXE   (0x00000008u)

Definition at line 312 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_SPRRD   (0x00000020u)

Definition at line 314 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_SPRWR   (0x00000010u)

Definition at line 313 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_USREXE   (0x00000001u)

Definition at line 309 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_USRRD   (0x00000004u)

Definition at line 311 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_FLTSTAT_TYPE_USRWR   (0x00000002u)

Definition at line 310 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST0CFG_BOOTRDY_MASK   (0x80000000u)

Definition at line 184 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST0CFG_BOOTRDY_RESETVAL   (0x00000000u)

Definition at line 186 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST0CFG_BOOTRDY_SHIFT   (0x0000001Fu)

Definition at line 185 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST0CFG_RESETVAL   (0x00000000u)

Definition at line 188 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST1CFG_BOOTRDY_MASK   (0x80000000u)

Definition at line 192 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST1CFG_BOOTRDY_RESETVAL   (0x00000001u)

Definition at line 194 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST1CFG_BOOTRDY_SHIFT   (0x0000001Fu)

Definition at line 193 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST1CFG_DSP_ISTP_RST_VAL_MASK   (0x003FFFFFu)

Definition at line 196 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST1CFG_DSP_ISTP_RST_VAL_RESETVAL   (0x00000000u)

Definition at line 198 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST1CFG_DSP_ISTP_RST_VAL_SHIFT   (0x00000000u)

Definition at line 197 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_HOST1CFG_RESETVAL   (0x80000000u)

Definition at line 200 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENCLR_ADDRERR_CLR_CLEAR_DIS   (0x00000001u)

Definition at line 260 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENCLR_ADDRERR_CLR_MASK   (0x00000002u)

Definition at line 256 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENCLR_ADDRERR_CLR_RESETVAL   (0x00000000u)

Definition at line 258 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENCLR_ADDRERR_CLR_SHIFT   (0x00000001u)

Definition at line 257 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENCLR_PROTERR_CLR_CLEAR_DIS   (0x00000001u)

Definition at line 266 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENCLR_PROTERR_CLR_MASK   (0x00000001u)

Definition at line 262 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENCLR_PROTERR_CLR_RESETVAL   (0x00000000u)

Definition at line 264 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENCLR_PROTERR_CLR_SHIFT   (0x00000000u)

Definition at line 263 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENCLR_RESETVAL   (0x00000000u)

Definition at line 268 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSET_ADDRERR_EN_MASK   (0x00000002u)

Definition at line 240 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSET_ADDRERR_EN_RESETVAL   (0x00000000u)

Definition at line 242 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSET_ADDRERR_EN_SET_EN   (0x00000001u)

Definition at line 244 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSET_ADDRERR_EN_SHIFT   (0x00000001u)

Definition at line 241 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSET_PROTERR_EN_MASK   (0x00000001u)

Definition at line 246 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSET_PROTERR_EN_RESETVAL   (0x00000000u)

Definition at line 248 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSET_PROTERR_EN_SET_EN   (0x00000001u)

Definition at line 250 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSET_PROTERR_EN_SHIFT   (0x00000000u)

Definition at line 247 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSET_RESETVAL   (0x00000000u)

Definition at line 252 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_ADDRERR_MASK   (0x00000002u)

Definition at line 222 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_ADDRERR_NOTSET   (0x00000000u)

Definition at line 226 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_ADDRERR_RESETVAL   (0x00000000u)

Definition at line 224 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_ADDRERR_SET_CLEAR   (0x00000001u)

Definition at line 227 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_ADDRERR_SHIFT   (0x00000001u)

Definition at line 223 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_PROTERR_MASK   (0x00000001u)

Definition at line 229 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_PROTERR_NOTSET   (0x00000000u)

Definition at line 233 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_PROTERR_RESETVAL   (0x00000000u)

Definition at line 231 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_PROTERR_SET_CLEAR   (0x00000001u)

Definition at line 234 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_PROTERR_SHIFT   (0x00000000u)

Definition at line 230 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IENSTAT_RESETVAL   (0x00000000u)

Definition at line 236 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_ADDRERR_MASK   (0x00000002u)

Definition at line 204 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_ADDRERR_NOTSET   (0x00000000u)

Definition at line 208 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_ADDRERR_RESETVAL   (0x00000000u)

Definition at line 206 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_ADDRERR_SET   (0x00000001u)

Definition at line 209 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_ADDRERR_SHIFT   (0x00000001u)

Definition at line 205 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_PROTERR_MASK   (0x00000001u)

Definition at line 211 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_PROTERR_NOTSET   (0x00000000u)

Definition at line 215 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_PROTERR_RESETVAL   (0x00000000u)

Definition at line 213 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_PROTERR_SET   (0x00000001u)

Definition at line 216 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_PROTERR_SHIFT   (0x00000000u)

Definition at line 212 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_IRAWSTAT_RESETVAL   (0x00000000u)

Definition at line 218 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_KICK0R_KICK0_MASK   (0xFFFFFFFFu)

Definition at line 168 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_KICK0R_KICK0_RESETVAL   (0x00000000u)

Definition at line 170 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_KICK0R_KICK0_SHIFT   (0x00000000u)

Definition at line 169 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_KICK0R_RESETVAL   (0x00000000u)

Definition at line 172 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_KICK1R_KICK1_MASK   (0xFFFFFFFFu)

Definition at line 176 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_KICK1R_KICK1_RESETVAL   (0x00000000u)

Definition at line 178 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_KICK1R_KICK1_SHIFT   (0x00000000u)

Definition at line 177 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_KICK1R_RESETVAL   (0x00000000u)

Definition at line 180 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_ARM_D_MASK   (0x00000070u)

Definition at line 332 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_ARM_D_SHIFT   (0x00000004u)

Definition at line 333 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_ARM_I_MASK   (0x00000007u)

Definition at line 335 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_ARM_I_SHIFT   (0x00000000u)

Definition at line 336 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_DSP_CFG_MASK   (0x00007000u)

Definition at line 326 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_DSP_CFG_SHIFT   (0x0000000Cu)

Definition at line 327 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_DSP_MDMA_MASK   (0x00000700u)

Definition at line 329 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_DSP_MDMA_SHIFT   (0x00000008u)

Definition at line 330 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_RESETVAL   (0x00000000u)

Definition at line 338 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_SATA_MASK   (0x00700000u)

Definition at line 320 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_SATA_SHIFT   (0x00000014u)

Definition at line 321 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_UPP_MASK   (0x00070000u)

Definition at line 323 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI0_UPP_SHIFT   (0x00000010u)

Definition at line 324 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_EDMA30TC0_MASK   (0x00000700u)

Definition at line 355 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_EDMA30TC0_RESETVAL   (0x00000000u)

Definition at line 357 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_EDMA30TC0_SHIFT   (0x00000008u)

Definition at line 356 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_EDMA30TC1_MASK   (0x00007000u)

Definition at line 351 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_EDMA30TC1_RESETVAL   (0x00000000u)

Definition at line 353 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_EDMA30TC1_SHIFT   (0x0000000Cu)

Definition at line 352 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_EDMA31TC0_MASK   (0x00070000u)

Definition at line 348 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_EDMA31TC0_SHIFT   (0x00000010u)

Definition at line 349 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_PRU0_MASK   (0x00000007u)

Definition at line 363 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_PRU0_RESETVAL   (0x00000000u)

Definition at line 365 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_PRU0_SHIFT   (0x00000000u)

Definition at line 364 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_PRU1_MASK   (0x00000070u)

Definition at line 359 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_PRU1_RESETVAL   (0x00000000u)

Definition at line 361 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_PRU1_SHIFT   (0x00000004u)

Definition at line 360 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_RESETVAL   (0x00000000u)

Definition at line 367 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_VPIF_DMA_0_MASK   (0x07000000u)

Definition at line 345 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_VPIF_DMA_0_SHIFT   (0x00000018u)

Definition at line 346 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_VPIF_DMA_1_MASK   (0x70000000u)

Definition at line 342 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI1_VPIF_DMA_1_SHIFT   (0x0000001Cu)

Definition at line 343 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_EMAC_MASK   (0x00000007u)

Definition at line 386 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_EMAC_SHIFT   (0x00000000u)

Definition at line 387 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_LCDC_MASK   (0x70000000u)

Definition at line 371 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_LCDC_SHIFT   (0x0000001Cu)

Definition at line 372 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_RESETVAL   (0x00000000u)

Definition at line 389 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_UHPI_MASK   (0x00700000u)

Definition at line 377 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_UHPI_SHIFT   (0x00000014u)

Definition at line 378 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_USB0CDMA_MASK   (0x00007000u)

Definition at line 380 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_USB0CDMA_SHIFT   (0x0000000Cu)

Definition at line 381 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_USB0CFG_MASK   (0x00000700u)

Definition at line 383 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_USB0CFG_SHIFT   (0x00000008u)

Definition at line 384 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_USB1_MASK   (0x07000000u)

Definition at line 374 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_MSTPRI2_USB1_SHIFT   (0x00000018u)

Definition at line 375 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_AFSR0   (0x00000001u)

Definition at line 448 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_DEFAULT   (0x00000000u)

Definition at line 447 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_GPIO0_13   (0x00000008u)

Definition at line 451 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_MASK   (0x00000F00u)

Definition at line 443 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_OBSERVE0_SYNC   (0x00000004u)

Definition at line 450 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_RESERVED2   (0x00000002u)

Definition at line 449 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_RESETVAL   (0x00000000u)

Definition at line 445 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_11_8_SHIFT   (0x00000008u)

Definition at line 444 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_AFSX0   (0x00000001u)

Definition at line 438 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_DEFAULT   (0x00000000u)

Definition at line 437 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_GPIO0_12   (0x00000008u)

Definition at line 441 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_MASK   (0x0000F000u)

Definition at line 433 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_OBSERVE0_LOS   (0x00000004u)

Definition at line 440 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_RESERVED2   (0x00000002u)

Definition at line 439 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_RESETVAL   (0x00000000u)

Definition at line 435 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_15_12_SHIFT   (0x0000000Cu)

Definition at line 434 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_AHCLKR0   (0x00000001u)

Definition at line 428 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_DEFAULT   (0x00000000u)

Definition at line 427 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_GPIO0_11   (0x00000008u)

Definition at line 431 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_MASK   (0x000F0000u)

Definition at line 423 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_PRU0_R30_18   (0x00000002u)

Definition at line 429 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_RESETVAL   (0x00000000u)

Definition at line 425 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_SHIFT   (0x00000010u)

Definition at line 424 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_19_16_UART1_RTS   (0x00000004u)

Definition at line 430 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_AHCLKX0   (0x00000001u)

Definition at line 418 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_DEFAULT   (0x00000000u)

Definition at line 417 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_GPIO0_10   (0x00000008u)

Definition at line 421 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_MASK   (0x00F00000u)

Definition at line 413 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_RESETVAL   (0x00000000u)

Definition at line 415 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_SHIFT   (0x00000014u)

Definition at line 414 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_UART1_CTS   (0x00000004u)

Definition at line 420 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_23_20_USB_REFCLKIN   (0x00000002u)

Definition at line 419 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_AMUTE0   (0x00000001u)

Definition at line 408 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_DEFAULT   (0x00000000u)

Definition at line 407 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_GPIO0_9   (0x00000008u)

Definition at line 411 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_MASK   (0x0F000000u)

Definition at line 403 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_PRU0_R30_16   (0x00000002u)

Definition at line 409 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_RESETVAL   (0x00000000u)

Definition at line 405 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_SHIFT   (0x00000018u)

Definition at line 404 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_27_24_UART2_RTS   (0x00000004u)

Definition at line 410 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_ALARM   (0x00000002u)

Definition at line 399 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_DEFAULT   (0x00000000u)

Definition at line 397 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_GPIO0_8   (0x00000008u)

Definition at line 401 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_MASK   (0xF0000000u)

Definition at line 393 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_RESERVED1   (0x00000001u)

Definition at line 398 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_RESETVAL   (0x00000000u)

Definition at line 395 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_SHIFT   (0x0000001Cu)

Definition at line 394 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_31_28_UART2_CTS   (0x00000004u)

Definition at line 400 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_ACLKR0   (0x00000001u)

Definition at line 468 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_DEFAULT   (0x00000000u)

Definition at line 467 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_GPIO0_15   (0x00000008u)

Definition at line 471 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_MASK   (0x0000000Fu)

Definition at line 463 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_PRU0_R30_20   (0x00000004u)

Definition at line 470 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_RESERVED2   (0x00000002u)

Definition at line 469 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_RESETVAL   (0x00000000u)

Definition at line 465 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_3_0_SHIFT   (0x00000000u)

Definition at line 464 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_ACLKX0   (0x00000001u)

Definition at line 458 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_DEFAULT   (0x00000000u)

Definition at line 457 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_GPIO0_14   (0x00000008u)

Definition at line 461 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_MASK   (0x000000F0u)

Definition at line 453 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_PRU0_R30_19   (0x00000004u)

Definition at line 460 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_RESERVED2   (0x00000002u)

Definition at line 459 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_RESETVAL   (0x00000000u)

Definition at line 455 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_PINMUX0_7_4_SHIFT   (0x00000004u)

Definition at line 454 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX0_RESETVAL   (0x00000000u)

Definition at line 473 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_DEFAULT   (0x00000000u)

Definition at line 1287 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_EMA_A21   (0x00000001u)

Definition at line 1288 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_GPIO4_5   (0x00000008u)

Definition at line 1291 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_MASK   (0x00000F00u)

Definition at line 1283 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_MMCSD0_DAT0   (0x00000002u)

Definition at line 1289 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_PRU1_R30_29   (0x00000004u)

Definition at line 1290 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_RESETVAL   (0x00000000u)

Definition at line 1285 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_11_8_SHIFT   (0x00000008u)

Definition at line 1284 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_DEFAULT   (0x00000000u)

Definition at line 1277 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_EMA_A20   (0x00000001u)

Definition at line 1278 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_GPIO4_4   (0x00000008u)

Definition at line 1281 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_MASK   (0x0000F000u)

Definition at line 1273 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_MMCSD0_DAT1   (0x00000002u)

Definition at line 1279 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_PRU1_R30_28   (0x00000004u)

Definition at line 1280 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_RESETVAL   (0x00000000u)

Definition at line 1275 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_15_12_SHIFT   (0x0000000Cu)

Definition at line 1274 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_DEFAULT   (0x00000000u)

Definition at line 1267 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_EMA_A19   (0x00000001u)

Definition at line 1268 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_GPIO4_3   (0x00000008u)

Definition at line 1271 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_MASK   (0x000F0000u)

Definition at line 1263 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_MMCSD0_DAT2   (0x00000002u)

Definition at line 1269 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_PRU1_R30_27   (0x00000004u)

Definition at line 1270 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_RESETVAL   (0x00000000u)

Definition at line 1265 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_19_16_SHIFT   (0x00000010u)

Definition at line 1264 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_DEFAULT   (0x00000000u)

Definition at line 1257 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_EMA_A18   (0x00000001u)

Definition at line 1258 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_GPIO4_2   (0x00000008u)

Definition at line 1261 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_MASK   (0x00F00000u)

Definition at line 1253 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_MMCSD0_DAT3   (0x00000002u)

Definition at line 1259 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_PRU1_R30_26   (0x00000004u)

Definition at line 1260 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_RESETVAL   (0x00000000u)

Definition at line 1255 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_23_20_SHIFT   (0x00000014u)

Definition at line 1254 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_DEFAULT   (0x00000000u)

Definition at line 1247 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_EMA_A17   (0x00000001u)

Definition at line 1248 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_GPIO4_1   (0x00000008u)

Definition at line 1251 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_MASK   (0x0F000000u)

Definition at line 1243 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_MMCSD0_DAT4   (0x00000002u)

Definition at line 1249 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_PRU1_R30_25   (0x00000004u)

Definition at line 1250 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_RESETVAL   (0x00000000u)

Definition at line 1245 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_27_24_SHIFT   (0x00000018u)

Definition at line 1244 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_DEFAULT   (0x00000000u)

Definition at line 1237 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_EMA_A16   (0x00000001u)

Definition at line 1238 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_GPIO4_0   (0x00000008u)

Definition at line 1241 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_MASK   (0xF0000000u)

Definition at line 1233 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_MMCSD0_DAT5   (0x00000002u)

Definition at line 1239 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_PRU1_R30_24   (0x00000004u)

Definition at line 1240 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_RESETVAL   (0x00000000u)

Definition at line 1235 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_31_28_SHIFT   (0x0000001Cu)

Definition at line 1234 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_DEFAULT   (0x00000000u)

Definition at line 1307 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_EMA_A23   (0x00000001u)

Definition at line 1308 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_GPIO4_7   (0x00000008u)

Definition at line 1311 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_MASK   (0x0000000Fu)

Definition at line 1303 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_MMCSD0_CLK   (0x00000002u)

Definition at line 1309 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_PRU1_R30_31   (0x00000004u)

Definition at line 1310 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_RESETVAL   (0x00000000u)

Definition at line 1305 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_3_0_SHIFT   (0x00000000u)

Definition at line 1304 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_DEFAULT   (0x00000000u)

Definition at line 1297 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_EMA_A22   (0x00000001u)

Definition at line 1298 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_GPIO4_6   (0x00000008u)

Definition at line 1301 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_MASK   (0x000000F0u)

Definition at line 1293 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_MMCSD0_CMD   (0x00000002u)

Definition at line 1299 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_PRU1_R30_30   (0x00000004u)

Definition at line 1300 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_RESETVAL   (0x00000000u)

Definition at line 1295 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_PINMUX10_7_4_SHIFT   (0x00000004u)

Definition at line 1294 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX10_RESETVAL   (0x00000000u)

Definition at line 1313 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_DEFAULT   (0x00000000u)

Definition at line 1371 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_EMA_A13   (0x00000001u)

Definition at line 1372 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_GPIO5_13   (0x00000008u)

Definition at line 1375 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_MASK   (0x00000F00u)

Definition at line 1367 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_PRU0_R30_21   (0x00000002u)

Definition at line 1373 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_PRU1_R30_21   (0x00000004u)

Definition at line 1374 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_RESETVAL   (0x00000000u)

Definition at line 1369 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_11_8_SHIFT   (0x00000008u)

Definition at line 1368 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_DEFAULT   (0x00000000u)

Definition at line 1361 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_EMA_A12   (0x00000001u)

Definition at line 1362 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_GPIO5_12   (0x00000008u)

Definition at line 1365 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_MASK   (0x0000F000u)

Definition at line 1357 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_PRU1_R30_20   (0x00000004u)

Definition at line 1364 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_RESERVED2   (0x00000002u)

Definition at line 1363 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_RESETVAL   (0x00000000u)

Definition at line 1359 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_15_12_SHIFT   (0x0000000Cu)

Definition at line 1358 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_DEFAULT   (0x00000000u)

Definition at line 1351 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_EMA_A11   (0x00000001u)

Definition at line 1352 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_GPIO5_11   (0x00000008u)

Definition at line 1355 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_MASK   (0x000F0000u)

Definition at line 1347 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_PRU1_R30_19   (0x00000004u)

Definition at line 1354 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_RESERVED2   (0x00000002u)

Definition at line 1353 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_RESETVAL   (0x00000000u)

Definition at line 1349 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_19_16_SHIFT   (0x00000010u)

Definition at line 1348 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_DEFAULT   (0x00000000u)

Definition at line 1341 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_EMA_A10   (0x00000001u)

Definition at line 1342 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_GPIO5_10   (0x00000008u)

Definition at line 1345 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_MASK   (0x00F00000u)

Definition at line 1337 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_PRU1_R30_18   (0x00000004u)

Definition at line 1344 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_RESERVED2   (0x00000002u)

Definition at line 1343 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_RESETVAL   (0x00000000u)

Definition at line 1339 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_23_20_SHIFT   (0x00000014u)

Definition at line 1338 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_DEFAULT   (0x00000000u)

Definition at line 1331 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_EMA_A9   (0x00000001u)

Definition at line 1332 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_GPIO5_9   (0x00000008u)

Definition at line 1335 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_MASK   (0x0F000000u)

Definition at line 1327 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_PRU1_R30_17   (0x00000004u)

Definition at line 1334 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_RESERVED2   (0x00000002u)

Definition at line 1333 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_RESETVAL   (0x00000000u)

Definition at line 1329 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_27_24_SHIFT   (0x00000018u)

Definition at line 1328 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_DEFAULT   (0x00000000u)

Definition at line 1321 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_EMA_A8   (0x00000001u)

Definition at line 1322 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_GPIO5_8   (0x00000008u)

Definition at line 1325 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_MASK   (0xF0000000u)

Definition at line 1317 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_PRU1_R30_16   (0x00000004u)

Definition at line 1324 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_RESERVED2   (0x00000002u)

Definition at line 1323 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_RESETVAL   (0x00000000u)

Definition at line 1319 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_31_28_SHIFT   (0x0000001Cu)

Definition at line 1318 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_DEFAULT   (0x00000000u)

Definition at line 1391 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_EMA_A15   (0x00000001u)

Definition at line 1392 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_GPIO5_15   (0x00000008u)

Definition at line 1395 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_MASK   (0x0000000Fu)

Definition at line 1387 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_MMCSD0_DAT6   (0x00000002u)

Definition at line 1393 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_PRU1_R30_23   (0x00000004u)

Definition at line 1394 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_RESETVAL   (0x00000000u)

Definition at line 1389 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_3_0_SHIFT   (0x00000000u)

Definition at line 1388 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_DEFAULT   (0x00000000u)

Definition at line 1381 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_EMA_A14   (0x00000001u)

Definition at line 1382 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_GPIO5_14   (0x00000008u)

Definition at line 1385 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_MASK   (0x000000F0u)

Definition at line 1377 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_MMCSD0_DAT7   (0x00000002u)

Definition at line 1383 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_PRU1_R30_22   (0x00000004u)

Definition at line 1384 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_RESETVAL   (0x00000000u)

Definition at line 1379 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_PINMUX11_7_4_SHIFT   (0x00000004u)

Definition at line 1378 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX11_RESETVAL   (0x00000000u)

Definition at line 1397 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_DEFAULT   (0x00000000u)

Definition at line 1455 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_EMA_A5   (0x00000001u)

Definition at line 1456 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_GPIO5_5   (0x00000008u)

Definition at line 1459 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_MASK   (0x00000F00u)

Definition at line 1451 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_RESERVED2   (0x00000002u)

Definition at line 1457 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_RESERVED4   (0x00000004u)

Definition at line 1458 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_RESETVAL   (0x00000000u)

Definition at line 1453 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_11_8_SHIFT   (0x00000008u)

Definition at line 1452 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_DEFAULT   (0x00000000u)

Definition at line 1445 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_EMA_A4   (0x00000001u)

Definition at line 1446 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_GPIO5_4   (0x00000008u)

Definition at line 1449 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_MASK   (0x0000F000u)

Definition at line 1441 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_RESERVED2   (0x00000002u)

Definition at line 1447 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_RESERVED4   (0x00000004u)

Definition at line 1448 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_RESETVAL   (0x00000000u)

Definition at line 1443 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_15_12_SHIFT   (0x0000000Cu)

Definition at line 1442 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_DEFAULT   (0x00000000u)

Definition at line 1435 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_EMA_A3   (0x00000001u)

Definition at line 1436 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_GPIO5_3   (0x00000008u)

Definition at line 1439 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_MASK   (0x000F0000u)

Definition at line 1431 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_RESERVED2   (0x00000002u)

Definition at line 1437 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_RESERVED4   (0x00000004u)

Definition at line 1438 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_RESETVAL   (0x00000000u)

Definition at line 1433 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_19_16_SHIFT   (0x00000010u)

Definition at line 1432 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_DEFAULT   (0x00000000u)

Definition at line 1425 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_EMA_A2   (0x00000001u)

Definition at line 1426 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_GPIO5_2   (0x00000008u)

Definition at line 1429 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_MASK   (0x00F00000u)

Definition at line 1421 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_RESERVED2   (0x00000002u)

Definition at line 1427 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_RESERVED4   (0x00000004u)

Definition at line 1428 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_RESETVAL   (0x00000000u)

Definition at line 1423 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_23_20_SHIFT   (0x00000014u)

Definition at line 1422 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_DEFAULT   (0x00000000u)

Definition at line 1415 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_EMA_A1   (0x00000001u)

Definition at line 1416 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_GPIO5_1   (0x00000008u)

Definition at line 1419 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_MASK   (0x0F000000u)

Definition at line 1411 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_RESERVED2   (0x00000002u)

Definition at line 1417 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_RESERVED4   (0x00000004u)

Definition at line 1418 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_RESETVAL   (0x00000000u)

Definition at line 1413 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_27_24_SHIFT   (0x00000018u)

Definition at line 1412 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_DEFAULT   (0x00000000u)

Definition at line 1405 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_EMA_A0   (0x00000001u)

Definition at line 1406 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_GPIO5_0   (0x00000008u)

Definition at line 1409 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_MASK   (0xF0000000u)

Definition at line 1401 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_RESERVED2   (0x00000002u)

Definition at line 1407 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_RESERVED4   (0x00000004u)

Definition at line 1408 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_RESETVAL   (0x00000000u)

Definition at line 1403 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_31_28_SHIFT   (0x0000001Cu)

Definition at line 1402 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_DEFAULT   (0x00000000u)

Definition at line 1475 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_EMA_A7   (0x00000001u)

Definition at line 1476 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_GPIO5_7   (0x00000008u)

Definition at line 1479 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_MASK   (0x0000000Fu)

Definition at line 1471 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_PRU1_R30_15   (0x00000004u)

Definition at line 1478 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_RESERVED2   (0x00000002u)

Definition at line 1477 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_RESETVAL   (0x00000000u)

Definition at line 1473 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_3_0_SHIFT   (0x00000000u)

Definition at line 1472 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_DEFAULT   (0x00000000u)

Definition at line 1465 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_EMA_A6   (0x00000001u)

Definition at line 1466 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_GPIO5_6   (0x00000008u)

Definition at line 1469 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_MASK   (0x000000F0u)

Definition at line 1461 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_RESERVED2   (0x00000002u)

Definition at line 1467 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_RESERVED4   (0x00000004u)

Definition at line 1468 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_RESETVAL   (0x00000000u)

Definition at line 1463 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_PINMUX12_7_4_SHIFT   (0x00000004u)

Definition at line 1462 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX12_RESETVAL   (0x00000000u)

Definition at line 1481 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_DEFAULT   (0x00000000u)

Definition at line 1539 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_GPIO6_13   (0x00000008u)

Definition at line 1543 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_MASK   (0x00000F00u)

Definition at line 1535 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_NUHPI_HRDY   (0x00000002u)

Definition at line 1541 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_PRU0_R30_31   (0x00000001u)

Definition at line 1540 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_PRU1_R30_12   (0x00000004u)

Definition at line 1542 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_RESETVAL   (0x00000000u)

Definition at line 1537 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_11_8_SHIFT   (0x00000008u)

Definition at line 1536 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_DEFAULT   (0x00000000u)

Definition at line 1529 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_GPIO6_12   (0x00000008u)

Definition at line 1533 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_MASK   (0x0000F000u)

Definition at line 1525 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_NUHPI_HINT   (0x00000002u)

Definition at line 1531 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_PRU0_R30_30   (0x00000001u)

Definition at line 1530 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_PRU1_R30_11   (0x00000004u)

Definition at line 1532 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_RESETVAL   (0x00000000u)

Definition at line 1527 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_15_12_SHIFT   (0x0000000Cu)

Definition at line 1526 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_CH1_CLK   (0x00000004u)

Definition at line 1522 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_DEFAULT   (0x00000000u)

Definition at line 1519 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_GPIO6_11   (0x00000008u)

Definition at line 1523 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_MASK   (0x000F0000u)

Definition at line 1515 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_PRU0_R30_29   (0x00000001u)

Definition at line 1520 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_RESETVAL   (0x00000000u)

Definition at line 1517 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_SHIFT   (0x00000010u)

Definition at line 1516 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_19_16_UHPI_HCNTL0   (0x00000002u)

Definition at line 1521 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_CH1_START   (0x00000004u)

Definition at line 1512 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_DEFAULT   (0x00000000u)

Definition at line 1509 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_GPIO6_10   (0x00000008u)

Definition at line 1513 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_MASK   (0x00F00000u)

Definition at line 1505 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_PRU0_R30_28   (0x00000001u)

Definition at line 1510 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_RESETVAL   (0x00000000u)

Definition at line 1507 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_SHIFT   (0x00000014u)

Definition at line 1506 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_23_20_UHPI_HCNTL1   (0x00000002u)

Definition at line 1511 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_CH1_ENABLE   (0x00000004u)

Definition at line 1502 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_DEFAULT   (0x00000000u)

Definition at line 1499 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_GPIO6_9   (0x00000008u)

Definition at line 1503 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_MASK   (0x0F000000u)

Definition at line 1495 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_PRU0_R30_27   (0x00000001u)

Definition at line 1500 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_RESETVAL   (0x00000000u)

Definition at line 1497 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_SHIFT   (0x00000018u)

Definition at line 1496 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_27_24_UHPI_HHWIL   (0x00000002u)

Definition at line 1501 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_CH1_WAIT   (0x00000004u)

Definition at line 1492 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_DEFAULT   (0x00000000u)

Definition at line 1489 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_GPIO6_8   (0x00000008u)

Definition at line 1493 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_MASK   (0xF0000000u)

Definition at line 1485 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_PRU0_R30_26   (0x00000001u)

Definition at line 1490 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_RESETVAL   (0x00000000u)

Definition at line 1487 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_SHIFT   (0x0000001Cu)

Definition at line 1486 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_31_28_UHPI_HRNW   (0x00000002u)

Definition at line 1491 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_DEFAULT   (0x00000000u)

Definition at line 1559 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_GPIO6_15   (0x00000008u)

Definition at line 1563 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_MASK   (0x0000000Fu)

Definition at line 1555 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_NRESETOUT   (0x00000001u)

Definition at line 1560 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_NUHPI_HAS   (0x00000002u)

Definition at line 1561 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_PRU1_R30_14   (0x00000004u)

Definition at line 1562 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_RESETVAL   (0x00000000u)

Definition at line 1557 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_3_0_SHIFT   (0x00000000u)

Definition at line 1556 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_DEFAULT   (0x00000000u)

Definition at line 1549 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_GPIO6_14   (0x00000008u)

Definition at line 1553 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_MASK   (0x000000F0u)

Definition at line 1545 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_NUHPI_HDS2   (0x00000002u)

Definition at line 1551 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_OBSCLK0   (0x00000001u)

Definition at line 1550 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_PRU1_R30_13   (0x00000004u)

Definition at line 1552 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_RESETVAL   (0x00000000u)

Definition at line 1547 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_PINMUX13_7_4_SHIFT   (0x00000004u)

Definition at line 1546 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX13_RESETVAL   (0x00000000u)

Definition at line 1565 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_DEFAULT   (0x00000000u)

Definition at line 1623 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_DIN7   (0x00000001u)

Definition at line 1624 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_MASK   (0x00000F00u)

Definition at line 1619 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_RESETVAL   (0x00000000u)

Definition at line 1621 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_RMII_TXD1   (0x00000008u)

Definition at line 1627 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_SHIFT   (0x00000008u)

Definition at line 1620 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_UHPI_HD15   (0x00000002u)

Definition at line 1625 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_11_8_UPP_D15   (0x00000004u)

Definition at line 1626 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_DEFAULT   (0x00000000u)

Definition at line 1613 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_DIN6   (0x00000001u)

Definition at line 1614 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_MASK   (0x0000F000u)

Definition at line 1609 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_RESETVAL   (0x00000000u)

Definition at line 1611 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_RMII_TXD0   (0x00000008u)

Definition at line 1617 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_SHIFT   (0x0000000Cu)

Definition at line 1610 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_UHPI_HD14   (0x00000002u)

Definition at line 1615 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_15_12_UPP_D14   (0x00000004u)

Definition at line 1616 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_DEFAULT   (0x00000000u)

Definition at line 1603 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_DIN5   (0x00000001u)

Definition at line 1604 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_MASK   (0x000F0000u)

Definition at line 1599 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_RESETVAL   (0x00000000u)

Definition at line 1601 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_RMII_TXEN   (0x00000008u)

Definition at line 1607 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_SHIFT   (0x00000010u)

Definition at line 1600 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_UHPI_HD13   (0x00000002u)

Definition at line 1605 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_19_16_UPP_D13   (0x00000004u)

Definition at line 1606 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_DEFAULT   (0x00000000u)

Definition at line 1593 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_DIN4   (0x00000001u)

Definition at line 1594 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_MASK   (0x00F00000u)

Definition at line 1589 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_RESETVAL   (0x00000000u)

Definition at line 1591 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_RMII_RXD1   (0x00000008u)

Definition at line 1597 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_SHIFT   (0x00000014u)

Definition at line 1590 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_UHPI_HD12   (0x00000002u)

Definition at line 1595 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_23_20_UPP_D12   (0x00000004u)

Definition at line 1596 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_DEFAULT   (0x00000000u)

Definition at line 1583 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_DIN3   (0x00000001u)

Definition at line 1584 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_MASK   (0x0F000000u)

Definition at line 1579 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_RESETVAL   (0x00000000u)

Definition at line 1581 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_RMII_RXD0   (0x00000008u)

Definition at line 1587 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_SHIFT   (0x00000018u)

Definition at line 1580 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_UHPI_HD11   (0x00000002u)

Definition at line 1585 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_27_24_UPP_D11   (0x00000004u)

Definition at line 1586 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_DEFAULT   (0x00000000u)

Definition at line 1573 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_DIN2   (0x00000001u)

Definition at line 1574 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_MASK   (0xF0000000u)

Definition at line 1569 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_RESETVAL   (0x00000000u)

Definition at line 1571 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_RMII_RXER   (0x00000008u)

Definition at line 1577 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_SHIFT   (0x0000001Cu)

Definition at line 1570 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_UHPI_HD10   (0x00000002u)

Definition at line 1575 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_31_28_UPP_D10   (0x00000004u)

Definition at line 1576 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_CLKIN0   (0x00000001u)

Definition at line 1644 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_DEFAULT   (0x00000000u)

Definition at line 1643 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_GPIO6_7   (0x00000008u)

Definition at line 1647 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_MASK   (0x0000000Fu)

Definition at line 1639 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_NUHPI_HCS   (0x00000002u)

Definition at line 1645 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_PRU1_R30_10   (0x00000004u)

Definition at line 1646 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_RESETVAL   (0x00000000u)

Definition at line 1641 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_3_0_SHIFT   (0x00000000u)

Definition at line 1640 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_CLKIN1   (0x00000001u)

Definition at line 1634 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_DEFAULT   (0x00000000u)

Definition at line 1633 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_GPIO6_6   (0x00000008u)

Definition at line 1637 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_MASK   (0x000000F0u)

Definition at line 1629 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_NUHPI_HDS1   (0x00000002u)

Definition at line 1635 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_PRU1_R30_9   (0x00000004u)

Definition at line 1636 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_RESETVAL   (0x00000000u)

Definition at line 1631 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_PINMUX14_7_4_SHIFT   (0x00000004u)

Definition at line 1630 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX14_RESETVAL   (0x00000000u)

Definition at line 1649 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_DEFAULT   (0x00000000u)

Definition at line 1707 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_DIN15_VSYNC   (0x00000001u)

Definition at line 1708 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_MASK   (0x00000F00u)

Definition at line 1703 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_PRU0_R30_15   (0x00000008u)

Definition at line 1711 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_RESETVAL   (0x00000000u)

Definition at line 1705 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_SHIFT   (0x00000008u)

Definition at line 1704 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_UHPI_HD7   (0x00000002u)

Definition at line 1709 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_11_8_UPP_D7   (0x00000004u)

Definition at line 1710 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_DEFAULT   (0x00000000u)

Definition at line 1697 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_DIN14_HSYNC   (0x00000001u)

Definition at line 1698 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_MASK   (0x0000F000u)

Definition at line 1693 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_PRU0_R30_14   (0x00000008u)

Definition at line 1701 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_RESETVAL   (0x00000000u)

Definition at line 1695 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_SHIFT   (0x0000000Cu)

Definition at line 1694 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_UHPI_HD6   (0x00000002u)

Definition at line 1699 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_15_12_UPP_D6   (0x00000004u)

Definition at line 1700 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_DEFAULT   (0x00000000u)

Definition at line 1687 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_DIN13_FIELD   (0x00000001u)

Definition at line 1688 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_MASK   (0x000F0000u)

Definition at line 1683 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_PRU0_R30_13   (0x00000008u)

Definition at line 1691 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_RESETVAL   (0x00000000u)

Definition at line 1685 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_SHIFT   (0x00000010u)

Definition at line 1684 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_UHPI_HD5   (0x00000002u)

Definition at line 1689 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_19_16_UPP_D5   (0x00000004u)

Definition at line 1690 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_DEFAULT   (0x00000000u)

Definition at line 1677 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_DIN12   (0x00000001u)

Definition at line 1678 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_MASK   (0x00F00000u)

Definition at line 1673 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_PRU0_R30_12   (0x00000008u)

Definition at line 1681 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_RESETVAL   (0x00000000u)

Definition at line 1675 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_SHIFT   (0x00000014u)

Definition at line 1674 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_UHPI_HD4   (0x00000002u)

Definition at line 1679 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_23_20_UPP_D4   (0x00000004u)

Definition at line 1680 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_DEFAULT   (0x00000000u)

Definition at line 1667 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_DIN11   (0x00000001u)

Definition at line 1668 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_MASK   (0x0F000000u)

Definition at line 1663 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_PRU0_R30_11   (0x00000008u)

Definition at line 1671 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_RESETVAL   (0x00000000u)

Definition at line 1665 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_SHIFT   (0x00000018u)

Definition at line 1664 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_UHPI_HD3   (0x00000002u)

Definition at line 1669 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_27_24_UPP_D3   (0x00000004u)

Definition at line 1670 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_DEFAULT   (0x00000000u)

Definition at line 1657 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_DIN10   (0x00000001u)

Definition at line 1658 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_MASK   (0xF0000000u)

Definition at line 1653 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_PRU0_R30_10   (0x00000008u)

Definition at line 1661 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_RESETVAL   (0x00000000u)

Definition at line 1655 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_SHIFT   (0x0000001Cu)

Definition at line 1654 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_UHPI_HD2   (0x00000002u)

Definition at line 1659 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_31_28_UPP_D2   (0x00000004u)

Definition at line 1660 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_DEFAULT   (0x00000000u)

Definition at line 1727 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_DIN1   (0x00000001u)

Definition at line 1728 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_MASK   (0x0000000Fu)

Definition at line 1723 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_RESETVAL   (0x00000000u)

Definition at line 1725 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_RMII_MHZ_50_CLK   (0x00000008u)

Definition at line 1731 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_SHIFT   (0x00000000u)

Definition at line 1724 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_UHPI_HD9   (0x00000002u)

Definition at line 1729 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_3_0_UPP_D9   (0x00000004u)

Definition at line 1730 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_DEFAULT   (0x00000000u)

Definition at line 1717 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_DIN0   (0x00000001u)

Definition at line 1718 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_MASK   (0x000000F0u)

Definition at line 1713 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_RESETVAL   (0x00000000u)

Definition at line 1715 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_RMII_CRS_DV   (0x00000008u)

Definition at line 1721 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_SHIFT   (0x00000004u)

Definition at line 1714 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_UHPI_HD8   (0x00000002u)

Definition at line 1719 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_PINMUX15_7_4_UPP_D8   (0x00000004u)

Definition at line 1720 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX15_RESETVAL   (0x00000000u)

Definition at line 1733 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_DEFAULT   (0x00000000u)

Definition at line 1791 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_DOUT7   (0x00000001u)

Definition at line 1792 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_GPIO7_15   (0x00000008u)

Definition at line 1795 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_LCD_D7   (0x00000002u)

Definition at line 1793 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_MASK   (0x00000F00u)

Definition at line 1787 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_RESETVAL   (0x00000000u)

Definition at line 1789 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_SHIFT   (0x00000008u)

Definition at line 1788 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_11_8_UPP_XD15   (0x00000004u)

Definition at line 1794 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_DEFAULT   (0x00000000u)

Definition at line 1781 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_DOUT6   (0x00000001u)

Definition at line 1782 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_GPIO7_14   (0x00000008u)

Definition at line 1785 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_LCD_D6   (0x00000002u)

Definition at line 1783 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_MASK   (0x0000F000u)

Definition at line 1777 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_RESETVAL   (0x00000000u)

Definition at line 1779 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_SHIFT   (0x0000000Cu)

Definition at line 1778 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_15_12_UPP_XD14   (0x00000004u)

Definition at line 1784 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_DEFAULT   (0x00000000u)

Definition at line 1771 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_DOUT5   (0x00000001u)

Definition at line 1772 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_GPIO7_13   (0x00000008u)

Definition at line 1775 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_LCD_D5   (0x00000002u)

Definition at line 1773 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_MASK   (0x000F0000u)

Definition at line 1767 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_RESETVAL   (0x00000000u)

Definition at line 1769 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_SHIFT   (0x00000010u)

Definition at line 1768 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_19_16_UPP_XD13   (0x00000004u)

Definition at line 1774 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_DEFAULT   (0x00000000u)

Definition at line 1761 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_DOUT4   (0x00000001u)

Definition at line 1762 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_GPIO7_12   (0x00000008u)

Definition at line 1765 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_LCD_D4   (0x00000002u)

Definition at line 1763 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_MASK   (0x00F00000u)

Definition at line 1757 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_RESETVAL   (0x00000000u)

Definition at line 1759 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_SHIFT   (0x00000014u)

Definition at line 1758 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_23_20_UPP_XD12   (0x00000004u)

Definition at line 1764 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_DEFAULT   (0x00000000u)

Definition at line 1751 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_DOUT3   (0x00000001u)

Definition at line 1752 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_GPIO7_11   (0x00000008u)

Definition at line 1755 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_LCD_D3   (0x00000002u)

Definition at line 1753 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_MASK   (0x0F000000u)

Definition at line 1747 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_RESETVAL   (0x00000000u)

Definition at line 1749 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_SHIFT   (0x00000018u)

Definition at line 1748 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_27_24_UPP_XD11   (0x00000004u)

Definition at line 1754 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_DEFAULT   (0x00000000u)

Definition at line 1741 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_DOUT2   (0x00000001u)

Definition at line 1742 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_GPIO7_10   (0x00000008u)

Definition at line 1745 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_LCD_D2   (0x00000002u)

Definition at line 1743 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_MASK   (0xF0000000u)

Definition at line 1737 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_RESETVAL   (0x00000000u)

Definition at line 1739 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_SHIFT   (0x0000001Cu)

Definition at line 1738 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_31_28_UPP_XD10   (0x00000004u)

Definition at line 1744 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_DEFAULT   (0x00000000u)

Definition at line 1811 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_DIN9   (0x00000001u)

Definition at line 1812 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_MASK   (0x0000000Fu)

Definition at line 1807 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_PRU0_R30_9   (0x00000008u)

Definition at line 1815 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_RESETVAL   (0x00000000u)

Definition at line 1809 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_SHIFT   (0x00000000u)

Definition at line 1808 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_UHPI_HD1   (0x00000002u)

Definition at line 1813 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_3_0_UPP_D1   (0x00000004u)

Definition at line 1814 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_DEFAULT   (0x00000000u)

Definition at line 1801 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_DIN8   (0x00000001u)

Definition at line 1802 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_GPIO6_5   (0x00000008u)

Definition at line 1805 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_MASK   (0x000000F0u)

Definition at line 1797 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_RESETVAL   (0x00000000u)

Definition at line 1799 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_SHIFT   (0x00000004u)

Definition at line 1798 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_UHPI_HD0   (0x00000002u)

Definition at line 1803 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_PINMUX16_7_4_UPP_D0   (0x00000004u)

Definition at line 1804 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX16_RESETVAL   (0x00000000u)

Definition at line 1817 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_DEFAULT   (0x00000000u)

Definition at line 1875 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_DOUT15   (0x00000001u)

Definition at line 1876 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_GPIO7_7   (0x00000008u)

Definition at line 1879 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_LCD_D15   (0x00000002u)

Definition at line 1877 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_MASK   (0x00000F00u)

Definition at line 1871 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_RESETVAL   (0x00000000u)

Definition at line 1873 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_SHIFT   (0x00000008u)

Definition at line 1872 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_11_8_UPP_XD7   (0x00000004u)

Definition at line 1878 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_DEFAULT   (0x00000000u)

Definition at line 1865 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_DOUT14   (0x00000001u)

Definition at line 1866 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_GPIO7_6   (0x00000008u)

Definition at line 1869 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_LCD_D14   (0x00000002u)

Definition at line 1867 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_MASK   (0x0000F000u)

Definition at line 1861 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_RESETVAL   (0x00000000u)

Definition at line 1863 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_SHIFT   (0x0000000Cu)

Definition at line 1862 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_15_12_UPP_XD6   (0x00000004u)

Definition at line 1868 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_DEFAULT   (0x00000000u)

Definition at line 1855 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_DOUT13   (0x00000001u)

Definition at line 1856 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_GPIO7_5   (0x00000008u)

Definition at line 1859 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_LCD_D13   (0x00000002u)

Definition at line 1857 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_MASK   (0x000F0000u)

Definition at line 1851 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_RESETVAL   (0x00000000u)

Definition at line 1853 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_SHIFT   (0x00000010u)

Definition at line 1852 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_19_16_UPP_XD5   (0x00000004u)

Definition at line 1858 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_DEFAULT   (0x00000000u)

Definition at line 1845 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_DOUT12   (0x00000001u)

Definition at line 1846 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_GPIO7_4   (0x00000008u)

Definition at line 1849 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_LCD_D12   (0x00000002u)

Definition at line 1847 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_MASK   (0x00F00000u)

Definition at line 1841 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_RESETVAL   (0x00000000u)

Definition at line 1843 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_SHIFT   (0x00000014u)

Definition at line 1842 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_23_20_UPP_XD4   (0x00000004u)

Definition at line 1848 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_DEFAULT   (0x00000000u)

Definition at line 1835 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_DOUT11   (0x00000001u)

Definition at line 1836 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_GPIO7_3   (0x00000008u)

Definition at line 1839 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_LCD_D11   (0x00000002u)

Definition at line 1837 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_MASK   (0x0F000000u)

Definition at line 1831 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_RESETVAL   (0x00000000u)

Definition at line 1833 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_SHIFT   (0x00000018u)

Definition at line 1832 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_27_24_UPP_XD3   (0x00000004u)

Definition at line 1838 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_DEFAULT   (0x00000000u)

Definition at line 1825 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_DOUT10   (0x00000001u)

Definition at line 1826 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_GPIO7_2   (0x00000008u)

Definition at line 1829 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_LCD_D10   (0x00000002u)

Definition at line 1827 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_MASK   (0xF0000000u)

Definition at line 1821 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_RESETVAL   (0x00000000u)

Definition at line 1823 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_SHIFT   (0x0000001Cu)

Definition at line 1822 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_31_28_UPP_XD2   (0x00000004u)

Definition at line 1828 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_DEFAULT   (0x00000000u)

Definition at line 1895 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_DOUT1   (0x00000001u)

Definition at line 1896 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_GPIO7_9   (0x00000008u)

Definition at line 1899 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_LCD_D1   (0x00000002u)

Definition at line 1897 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_MASK   (0x0000000Fu)

Definition at line 1891 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_RESETVAL   (0x00000000u)

Definition at line 1893 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_SHIFT   (0x00000000u)

Definition at line 1892 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_3_0_UPP_XD9   (0x00000004u)

Definition at line 1898 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_DEFAULT   (0x00000000u)

Definition at line 1885 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_DOUT0   (0x00000001u)

Definition at line 1886 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_GPIO7_8   (0x00000008u)

Definition at line 1889 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_LCD_D0   (0x00000002u)

Definition at line 1887 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_MASK   (0x000000F0u)

Definition at line 1881 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_RESETVAL   (0x00000000u)

Definition at line 1883 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_SHIFT   (0x00000004u)

Definition at line 1882 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_PINMUX17_7_4_UPP_XD8   (0x00000004u)

Definition at line 1888 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX17_RESETVAL   (0x00000000u)

Definition at line 1901 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_CH0_CLK   (0x00000004u)

Definition at line 1962 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_DEFAULT   (0x00000000u)

Definition at line 1959 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_GPIO8_15   (0x00000008u)

Definition at line 1963 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_MASK   (0x00000F00u)

Definition at line 1955 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_MMCSD1_DAT0   (0x00000002u)

Definition at line 1961 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_PRU0_R30_25   (0x00000001u)

Definition at line 1960 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_RESETVAL   (0x00000000u)

Definition at line 1957 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_11_8_SHIFT   (0x00000008u)

Definition at line 1956 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_CH0_START   (0x00000004u)

Definition at line 1952 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_DEFAULT   (0x00000000u)

Definition at line 1949 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_GPIO8_14   (0x00000008u)

Definition at line 1953 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_MASK   (0x0000F000u)

Definition at line 1945 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_MMCSD1_CLK   (0x00000002u)

Definition at line 1951 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_PRU0_R30_24   (0x00000001u)

Definition at line 1950 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_RESETVAL   (0x00000000u)

Definition at line 1947 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_15_12_SHIFT   (0x0000000Cu)

Definition at line 1946 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_CH0_ENABLE   (0x00000004u)

Definition at line 1942 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_DEFAULT   (0x00000000u)

Definition at line 1939 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_GPIO8_13   (0x00000008u)

Definition at line 1943 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_MASK   (0x000F0000u)

Definition at line 1935 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_MMCSD1_CMD   (0x00000002u)

Definition at line 1941 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_PRU0_R30_23   (0x00000001u)

Definition at line 1940 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_RESETVAL   (0x00000000u)

Definition at line 1937 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_19_16_SHIFT   (0x00000010u)

Definition at line 1936 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_CH0_WAIT   (0x00000004u)

Definition at line 1932 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_DEFAULT   (0x00000000u)

Definition at line 1929 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_GPIO8_12   (0x00000008u)

Definition at line 1933 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_MASK   (0x00F00000u)

Definition at line 1925 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_PRU0_R30_22   (0x00000001u)

Definition at line 1930 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_PRU1_R30_8   (0x00000002u)

Definition at line 1931 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_RESETVAL   (0x00000000u)

Definition at line 1927 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_23_20_SHIFT   (0x00000014u)

Definition at line 1926 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_DEFAULT   (0x00000000u)

Definition at line 1919 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_GPIO8_11   (0x00000008u)

Definition at line 1923 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_LCD_PCLK   (0x00000002u)

Definition at line 1921 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_MASK   (0x0F000000u)

Definition at line 1915 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_MMCSD1_DAT7   (0x00000001u)

Definition at line 1920 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_PRU1_R30_7   (0x00000004u)

Definition at line 1922 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_RESETVAL   (0x00000000u)

Definition at line 1917 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_27_24_SHIFT   (0x00000018u)

Definition at line 1916 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_DEFAULT   (0x00000000u)

Definition at line 1909 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_GPIO8_10   (0x00000008u)

Definition at line 1913 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_LCD_MCLK   (0x00000002u)

Definition at line 1911 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_MASK   (0xF0000000u)

Definition at line 1905 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_MMCSD1_DAT6   (0x00000001u)

Definition at line 1910 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_PRU1_R30_6   (0x00000004u)

Definition at line 1912 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_RESETVAL   (0x00000000u)

Definition at line 1907 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_31_28_SHIFT   (0x0000001Cu)

Definition at line 1906 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_DEFAULT   (0x00000000u)

Definition at line 1979 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_DOUT9   (0x00000001u)

Definition at line 1980 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_GPIO7_1   (0x00000008u)

Definition at line 1983 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_LCD_D9   (0x00000002u)

Definition at line 1981 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_MASK   (0x0000000Fu)

Definition at line 1975 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_RESETVAL   (0x00000000u)

Definition at line 1977 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_SHIFT   (0x00000000u)

Definition at line 1976 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_3_0_UPP_XD1   (0x00000004u)

Definition at line 1982 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_DEFAULT   (0x00000000u)

Definition at line 1969 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_DOUT8   (0x00000001u)

Definition at line 1970 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_GPIO7_0   (0x00000008u)

Definition at line 1973 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_LCD_D8   (0x00000002u)

Definition at line 1971 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_MASK   (0x000000F0u)

Definition at line 1965 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_RESETVAL   (0x00000000u)

Definition at line 1967 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_SHIFT   (0x00000004u)

Definition at line 1966 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_PINMUX18_7_4_UPP_XD0   (0x00000004u)

Definition at line 1972 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX18_RESETVAL   (0x00000000u)

Definition at line 1985 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_CLKIN2   (0x00000001u)

Definition at line 2044 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_DEFAULT   (0x00000000u)

Definition at line 2043 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_GPIO6_4   (0x00000008u)

Definition at line 2047 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_MASK   (0x00000F00u)

Definition at line 2039 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_MMCSD1_DAT3   (0x00000002u)

Definition at line 2045 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_PRU1_R30_3   (0x00000004u)

Definition at line 2046 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_RESETVAL   (0x00000000u)

Definition at line 2041 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_11_8_SHIFT   (0x00000008u)

Definition at line 2040 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_CLKO2   (0x00000001u)

Definition at line 2034 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_DEFAULT   (0x00000000u)

Definition at line 2033 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_GPIO6_3   (0x00000008u)

Definition at line 2037 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_MASK   (0x0000F000u)

Definition at line 2029 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_MMCSD1_DAT2   (0x00000002u)

Definition at line 2035 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_PRU1_R30_2   (0x00000004u)

Definition at line 2036 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_RESETVAL   (0x00000000u)

Definition at line 2031 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_15_12_SHIFT   (0x0000000Cu)

Definition at line 2030 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_CLKIN3   (0x00000001u)

Definition at line 2024 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_DEFAULT   (0x00000000u)

Definition at line 2023 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_GPIO6_2   (0x00000008u)

Definition at line 2027 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_MASK   (0x000F0000u)

Definition at line 2019 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_MMCSD1_DAT1   (0x00000002u)

Definition at line 2025 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_PRU1_R30_1   (0x00000004u)

Definition at line 2026 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_RESETVAL   (0x00000000u)

Definition at line 2021 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_19_16_SHIFT   (0x00000010u)

Definition at line 2020 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_CLKO3   (0x00000001u)

Definition at line 2014 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_DEFAULT   (0x00000000u)

Definition at line 2013 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_GPIO6_1   (0x00000008u)

Definition at line 2017 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_MASK   (0x00F00000u)

Definition at line 2009 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_PRU1_R30_0   (0x00000004u)

Definition at line 2016 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_RESERVED2   (0x00000002u)

Definition at line 2015 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_RESETVAL   (0x00000000u)

Definition at line 2011 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_23_20_SHIFT   (0x00000014u)

Definition at line 2010 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_DEFAULT   (0x00000000u)

Definition at line 2003 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_GPIO6_0   (0x00000008u)

Definition at line 2007 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_MASK   (0x0F000000u)

Definition at line 1999 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_NLCD_AC_ENB_CS   (0x00000002u)

Definition at line 2005 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_RESERVED1   (0x00000001u)

Definition at line 2004 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_RESERVED4   (0x00000004u)

Definition at line 2006 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_RESETVAL   (0x00000000u)

Definition at line 2001 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_27_24_SHIFT   (0x00000018u)

Definition at line 2000 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_DEFAULT   (0x00000000u)

Definition at line 1993 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_GPIO8_0   (0x00000008u)

Definition at line 1997 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_MASK   (0xF0000000u)

Definition at line 1989 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_RESERVED2   (0x00000002u)

Definition at line 1995 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_RESERVED4   (0x00000004u)

Definition at line 1996 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_RESETVAL   (0x00000000u)

Definition at line 1991 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_RTCK   (0x00000001u)

Definition at line 1994 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_31_28_SHIFT   (0x0000001Cu)

Definition at line 1990 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_DEFAULT   (0x00000000u)

Definition at line 2063 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_GPIO8_9   (0x00000008u)

Definition at line 2067 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_LCD_HSYNC   (0x00000002u)

Definition at line 2065 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_MASK   (0x0000000Fu)

Definition at line 2059 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_MMCSD1_DAT5   (0x00000001u)

Definition at line 2064 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_PRU1_R30_5   (0x00000004u)

Definition at line 2066 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_RESETVAL   (0x00000000u)

Definition at line 2061 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_3_0_SHIFT   (0x00000000u)

Definition at line 2060 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_DEFAULT   (0x00000000u)

Definition at line 2053 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_GPIO8_8   (0x00000008u)

Definition at line 2057 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_LCD_VSYNC   (0x00000002u)

Definition at line 2055 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_MASK   (0x000000F0u)

Definition at line 2049 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_MMCSD1_DAT4   (0x00000001u)

Definition at line 2054 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_PRU1_R30_4   (0x00000004u)

Definition at line 2056 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_RESETVAL   (0x00000000u)

Definition at line 2051 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_PINMUX19_7_4_SHIFT   (0x00000004u)

Definition at line 2050 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX19_RESETVAL   (0x00000000u)

Definition at line 2069 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_AXR0_13   (0x00000001u)

Definition at line 532 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_CLKX1   (0x00000002u)

Definition at line 533 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_DEFAULT   (0x00000000u)

Definition at line 531 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_GPIO0_5   (0x00000008u)

Definition at line 535 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_MASK   (0x00000F00u)

Definition at line 527 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_OBSERVE0_COMINIT   (0x00000004u)

Definition at line 534 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_RESETVAL   (0x00000000u)

Definition at line 529 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_11_8_SHIFT   (0x00000008u)

Definition at line 528 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_AXR0_12   (0x00000001u)

Definition at line 522 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_DEFAULT   (0x00000000u)

Definition at line 521 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_FSR1   (0x00000002u)

Definition at line 523 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_GPIO0_4   (0x00000008u)

Definition at line 525 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_MASK   (0x0000F000u)

Definition at line 517 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_OBSERVE0_PHY_READY   (0x00000004u)

Definition at line 524 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_RESETVAL   (0x00000000u)

Definition at line 519 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_15_12_SHIFT   (0x0000000Cu)

Definition at line 518 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_AXR0_11   (0x00000001u)

Definition at line 512 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_DEFAULT   (0x00000000u)

Definition at line 511 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_FSX1   (0x00000002u)

Definition at line 513 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_GPIO0_3   (0x00000008u)

Definition at line 515 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_MASK   (0x000F0000u)

Definition at line 507 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_OBSERVE0_PHY_STATE0   (0x00000004u)

Definition at line 514 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_RESETVAL   (0x00000000u)

Definition at line 509 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_19_16_SHIFT   (0x00000010u)

Definition at line 508 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_AXR0_10   (0x00000001u)

Definition at line 502 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_DEFAULT   (0x00000000u)

Definition at line 501 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_DR1   (0x00000002u)

Definition at line 503 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_GPIO0_2   (0x00000008u)

Definition at line 505 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_MASK   (0x00F00000u)

Definition at line 497 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_OBSERVE0_PHY_STATE1   (0x00000004u)

Definition at line 504 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_RESETVAL   (0x00000000u)

Definition at line 499 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_23_20_SHIFT   (0x00000014u)

Definition at line 498 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_AXR0_9   (0x00000001u)

Definition at line 492 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_DEFAULT   (0x00000000u)

Definition at line 491 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_DX1   (0x00000002u)

Definition at line 493 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_GPIO0_1   (0x00000008u)

Definition at line 495 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_MASK   (0x0F000000u)

Definition at line 487 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_OBSERVE0_PHY_STATE2   (0x00000004u)

Definition at line 494 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_RESETVAL   (0x00000000u)

Definition at line 489 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_27_24_SHIFT   (0x00000018u)

Definition at line 488 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_AXR0_8   (0x00000001u)

Definition at line 482 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_CLKS1   (0x00000002u)

Definition at line 483 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_DEFAULT   (0x00000000u)

Definition at line 481 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_ECAP1   (0x00000004u)

Definition at line 484 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_GPIO0_0   (0x00000008u)

Definition at line 485 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_MASK   (0xF0000000u)

Definition at line 477 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_RESETVAL   (0x00000000u)

Definition at line 479 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_31_28_SHIFT   (0x0000001Cu)

Definition at line 478 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_AXR0_15   (0x00000001u)

Definition at line 552 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_DEFAULT   (0x00000000u)

Definition at line 551 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_ECAP2   (0x00000004u)

Definition at line 554 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_EPWM0TZ0   (0x00000002u)

Definition at line 553 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_GPIO0_7   (0x00000008u)

Definition at line 555 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_MASK   (0x0000000Fu)

Definition at line 547 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_RESETVAL   (0x00000000u)

Definition at line 549 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_3_0_SHIFT   (0x00000000u)

Definition at line 548 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_AXR0_14   (0x00000001u)

Definition at line 542 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_CLKR1   (0x00000002u)

Definition at line 543 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_DEFAULT   (0x00000000u)

Definition at line 541 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_GPIO0_6   (0x00000008u)

Definition at line 545 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_MASK   (0x000000F0u)

Definition at line 537 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_OBSERVE0_COMWAKE   (0x00000004u)

Definition at line 544 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_RESETVAL   (0x00000000u)

Definition at line 539 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_PINMUX1_7_4_SHIFT   (0x00000004u)

Definition at line 538 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX1_RESETVAL   (0x00000000u)

Definition at line 557 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_AXR0_5   (0x00000001u)

Definition at line 616 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_CLKX0   (0x00000002u)

Definition at line 617 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_DEFAULT   (0x00000000u)

Definition at line 615 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_GPIO1_13   (0x00000004u)

Definition at line 618 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_MASK   (0x00000F00u)

Definition at line 611 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_MII_TXCLK   (0x00000008u)

Definition at line 619 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_RESETVAL   (0x00000000u)

Definition at line 613 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_11_8_SHIFT   (0x00000008u)

Definition at line 612 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_AXR0_4   (0x00000001u)

Definition at line 606 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_DEFAULT   (0x00000000u)

Definition at line 605 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_FSR0   (0x00000002u)

Definition at line 607 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_GPIO1_12   (0x00000004u)

Definition at line 608 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_MASK   (0x0000F000u)

Definition at line 601 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_MII_COL   (0x00000008u)

Definition at line 609 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_RESETVAL   (0x00000000u)

Definition at line 603 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_15_12_SHIFT   (0x0000000Cu)

Definition at line 602 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_AXR0_3   (0x00000001u)

Definition at line 596 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_DEFAULT   (0x00000000u)

Definition at line 595 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_FSX0   (0x00000002u)

Definition at line 597 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_GPIO1_11   (0x00000004u)

Definition at line 598 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_MASK   (0x000F0000u)

Definition at line 591 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_MII_TXD3   (0x00000008u)

Definition at line 599 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_RESETVAL   (0x00000000u)

Definition at line 593 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_19_16_SHIFT   (0x00000010u)

Definition at line 592 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_AXR0_2   (0x00000001u)

Definition at line 586 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_DEFAULT   (0x00000000u)

Definition at line 585 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_DR0   (0x00000002u)

Definition at line 587 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_GPIO1_10   (0x00000004u)

Definition at line 588 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_MASK   (0x00F00000u)

Definition at line 581 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_MII_TXD2   (0x00000008u)

Definition at line 589 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_RESETVAL   (0x00000000u)

Definition at line 583 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_23_20_SHIFT   (0x00000014u)

Definition at line 582 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_AXR0_1   (0x00000001u)

Definition at line 576 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_DEFAULT   (0x00000000u)

Definition at line 575 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_DX0   (0x00000002u)

Definition at line 577 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_GPIO1_9   (0x00000004u)

Definition at line 578 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_MASK   (0x0F000000u)

Definition at line 571 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_MII_TXD1   (0x00000008u)

Definition at line 579 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_RESETVAL   (0x00000000u)

Definition at line 573 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_27_24_SHIFT   (0x00000018u)

Definition at line 572 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_AXR0_0   (0x00000001u)

Definition at line 566 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_DEFAULT   (0x00000000u)

Definition at line 565 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_ECAP0   (0x00000002u)

Definition at line 567 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_GPIO8_7   (0x00000004u)

Definition at line 568 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_MASK   (0xF0000000u)

Definition at line 561 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_MII_TXD0   (0x00000008u)

Definition at line 569 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_RESETVAL   (0x00000000u)

Definition at line 563 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_31_28_SHIFT   (0x0000001Cu)

Definition at line 562 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_AXR0_7   (0x00000001u)

Definition at line 636 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_DEFAULT   (0x00000000u)

Definition at line 635 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_EPWM1TZ0   (0x00000002u)

Definition at line 637 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_GPIO1_15   (0x00000008u)

Definition at line 639 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_MASK   (0x0000000Fu)

Definition at line 631 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_PRU0_R30_17   (0x00000004u)

Definition at line 638 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_RESETVAL   (0x00000000u)

Definition at line 633 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_3_0_SHIFT   (0x00000000u)

Definition at line 632 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_AXR0_6   (0x00000001u)

Definition at line 626 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_CLKR0   (0x00000002u)

Definition at line 627 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_DEFAULT   (0x00000000u)

Definition at line 625 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_GPIO1_14   (0x00000004u)

Definition at line 628 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_MASK   (0x000000F0u)

Definition at line 621 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_MII_TXEN   (0x00000008u)

Definition at line 629 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_RESETVAL   (0x00000000u)

Definition at line 623 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_PINMUX2_7_4_SHIFT   (0x00000004u)

Definition at line 622 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX2_RESETVAL   (0x00000000u)

Definition at line 641 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_DEFAULT   (0x00000000u)

Definition at line 699 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_EPWMSYNCI   (0x00000002u)

Definition at line 701 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_GPIO8_6   (0x00000004u)

Definition at line 702 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_MASK   (0x00000F00u)

Definition at line 695 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_MII_RXER   (0x00000008u)

Definition at line 703 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_RESETVAL   (0x00000000u)

Definition at line 697 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_SHIFT   (0x00000008u)

Definition at line 696 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_11_8_SPI0_SOMI0   (0x00000001u)

Definition at line 700 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_DEFAULT   (0x00000000u)

Definition at line 689 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_EPWMSYNCO   (0x00000002u)

Definition at line 691 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_GPIO8_5   (0x00000004u)

Definition at line 692 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_MASK   (0x0000F000u)

Definition at line 685 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_MII_CRS   (0x00000008u)

Definition at line 693 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_RESETVAL   (0x00000000u)

Definition at line 687 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_SHIFT   (0x0000000Cu)

Definition at line 686 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_15_12_SPI0_SIMO0   (0x00000001u)

Definition at line 690 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_DEFAULT   (0x00000000u)

Definition at line 679 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_GPIO8_4   (0x00000004u)

Definition at line 682 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_MASK   (0x000F0000u)

Definition at line 675 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_MII_RXD3   (0x00000008u)

Definition at line 683 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_NSPI0_SCS5   (0x00000001u)

Definition at line 680 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_RESETVAL   (0x00000000u)

Definition at line 677 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_SHIFT   (0x00000010u)

Definition at line 676 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_19_16_UART0_RXD   (0x00000002u)

Definition at line 681 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_DEFAULT   (0x00000000u)

Definition at line 669 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_GPIO8_3   (0x00000004u)

Definition at line 672 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_MASK   (0x00F00000u)

Definition at line 665 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_MII_RXD2   (0x00000008u)

Definition at line 673 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_NSPI0_SCS4   (0x00000001u)

Definition at line 670 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_RESETVAL   (0x00000000u)

Definition at line 667 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_SHIFT   (0x00000014u)

Definition at line 666 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_23_20_UART0_TXD   (0x00000002u)

Definition at line 671 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_DEFAULT   (0x00000000u)

Definition at line 659 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_GPIO8_2   (0x00000004u)

Definition at line 662 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_MASK   (0x0F000000u)

Definition at line 655 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_MII_RXD1   (0x00000008u)

Definition at line 663 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_NSPI0_SCS3   (0x00000001u)

Definition at line 660 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_RESETVAL   (0x00000000u)

Definition at line 657 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_SHIFT   (0x00000018u)

Definition at line 656 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_27_24_UART0_CTS   (0x00000002u)

Definition at line 661 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_DEFAULT   (0x00000000u)

Definition at line 649 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_GPIO8_1   (0x00000004u)

Definition at line 652 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_MASK   (0xF0000000u)

Definition at line 645 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_MII_RXD0   (0x00000008u)

Definition at line 653 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_NSPI0_SCS2   (0x00000001u)

Definition at line 650 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_RESETVAL   (0x00000000u)

Definition at line 647 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_SHIFT   (0x0000001Cu)

Definition at line 646 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_31_28_UART0_RTS   (0x00000002u)

Definition at line 651 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_DEFAULT   (0x00000000u)

Definition at line 719 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_EPWM0A   (0x00000002u)

Definition at line 721 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_GPIO1_8   (0x00000004u)

Definition at line 722 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_MASK   (0x0000000Fu)

Definition at line 715 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_MII_RXCLK   (0x00000008u)

Definition at line 723 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_RESETVAL   (0x00000000u)

Definition at line 717 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_SHIFT   (0x00000000u)

Definition at line 716 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_3_0_SPI0_CLK   (0x00000001u)

Definition at line 720 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_DEFAULT   (0x00000000u)

Definition at line 709 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_EPWM0B   (0x00000002u)

Definition at line 711 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_MASK   (0x000000F0u)

Definition at line 705 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_MII_RXDV   (0x00000008u)

Definition at line 713 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_NSPI0_ENA   (0x00000001u)

Definition at line 710 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_PRU0_R30_6   (0x00000004u)

Definition at line 712 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_RESETVAL   (0x00000000u)

Definition at line 707 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_PINMUX3_7_4_SHIFT   (0x00000004u)

Definition at line 706 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX3_RESETVAL   (0x00000000u)

Definition at line 725 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_DEFAULT   (0x00000000u)

Definition at line 783 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_GPIO1_5   (0x00000008u)

Definition at line 787 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_I2C0_SCL   (0x00000002u)

Definition at line 785 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_MASK   (0x00000F00u)

Definition at line 779 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_NSPI1_SCS7   (0x00000001u)

Definition at line 784 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_RESETVAL   (0x00000000u)

Definition at line 781 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_SHIFT   (0x00000008u)

Definition at line 780 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_11_8_TM64P2_OUT12   (0x00000004u)

Definition at line 786 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_DEFAULT   (0x00000000u)

Definition at line 773 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_GPIO1_4   (0x00000008u)

Definition at line 777 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_I2C0_SDA   (0x00000002u)

Definition at line 775 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_MASK   (0x0000F000u)

Definition at line 769 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_NSPI1_SCS6   (0x00000001u)

Definition at line 774 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_RESETVAL   (0x00000000u)

Definition at line 771 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_SHIFT   (0x0000000Cu)

Definition at line 770 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_15_12_TM64P3_OUT12   (0x00000004u)

Definition at line 776 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_DEFAULT   (0x00000000u)

Definition at line 763 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_GPIO1_3   (0x00000008u)

Definition at line 767 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_I2C1_SCL   (0x00000004u)

Definition at line 766 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_MASK   (0x000F0000u)

Definition at line 759 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_NSPI1_SCS5   (0x00000001u)

Definition at line 764 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_RESETVAL   (0x00000000u)

Definition at line 761 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_SHIFT   (0x00000010u)

Definition at line 760 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_19_16_UART2_RXD   (0x00000002u)

Definition at line 765 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_DEFAULT   (0x00000000u)

Definition at line 753 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_GPIO1_2   (0x00000008u)

Definition at line 757 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_I2C1_SDA   (0x00000004u)

Definition at line 756 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_MASK   (0x00F00000u)

Definition at line 749 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_NSPI1_SCS4   (0x00000001u)

Definition at line 754 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_RESETVAL   (0x00000000u)

Definition at line 751 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_SHIFT   (0x00000014u)

Definition at line 750 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_23_20_UART2_TXD   (0x00000002u)

Definition at line 755 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_DEFAULT   (0x00000000u)

Definition at line 743 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_GPIO1_1   (0x00000008u)

Definition at line 747 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_LED   (0x00000004u)

Definition at line 746 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_MASK   (0x0F000000u)

Definition at line 739 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_NSPI1_SCS3   (0x00000001u)

Definition at line 744 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_RESETVAL   (0x00000000u)

Definition at line 741 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_SHIFT   (0x00000018u)

Definition at line 740 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_27_24_UART1_RXD   (0x00000002u)

Definition at line 745 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_CP_POD   (0x00000004u)

Definition at line 736 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_DEFAULT   (0x00000000u)

Definition at line 733 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_GPIO1_0   (0x00000008u)

Definition at line 737 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_MASK   (0xF0000000u)

Definition at line 729 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_NSPI1_SCS2   (0x00000001u)

Definition at line 734 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_RESETVAL   (0x00000000u)

Definition at line 731 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_SHIFT   (0x0000001Cu)

Definition at line 730 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_31_28_UART1_TXD   (0x00000002u)

Definition at line 735 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_DEFAULT   (0x00000000u)

Definition at line 803 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_GPIO1_7   (0x00000004u)

Definition at line 806 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_MASK   (0x0000000Fu)

Definition at line 799 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_MDIO_CLK   (0x00000008u)

Definition at line 807 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_NSPI0_SCS1   (0x00000001u)

Definition at line 804 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_RESETVAL   (0x00000000u)

Definition at line 801 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_SHIFT   (0x00000000u)

Definition at line 800 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_3_0_TM64P0_OUT12   (0x00000002u)

Definition at line 805 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_DEFAULT   (0x00000000u)

Definition at line 793 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_GPIO1_6   (0x00000004u)

Definition at line 796 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_MASK   (0x000000F0u)

Definition at line 789 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_MDIO_D   (0x00000008u)

Definition at line 797 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_NSPI0_SCS0   (0x00000001u)

Definition at line 794 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_RESETVAL   (0x00000000u)

Definition at line 791 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_SHIFT   (0x00000004u)

Definition at line 790 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_PINMUX4_7_4_TM64P1_OUT12   (0x00000002u)

Definition at line 795 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX4_RESETVAL   (0x00000000u)

Definition at line 809 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_DEFAULT   (0x00000000u)

Definition at line 867 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_GPIO2_13   (0x00000008u)

Definition at line 871 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_MASK   (0x00000F00u)

Definition at line 863 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_RESERVED2   (0x00000002u)

Definition at line 869 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_RESERVED4   (0x00000004u)

Definition at line 870 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_RESETVAL   (0x00000000u)

Definition at line 865 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_SHIFT   (0x00000008u)

Definition at line 864 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_11_8_SPI1_CLK   (0x00000001u)

Definition at line 868 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_DEFAULT   (0x00000000u)

Definition at line 857 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_GPIO2_12   (0x00000008u)

Definition at line 861 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_MASK   (0x0000F000u)

Definition at line 853 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_NSPI1_ENA   (0x00000001u)

Definition at line 858 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_RESERVED2   (0x00000002u)

Definition at line 859 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_RESERVED4   (0x00000004u)

Definition at line 860 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_RESETVAL   (0x00000000u)

Definition at line 855 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_15_12_SHIFT   (0x0000000Cu)

Definition at line 854 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_DEFAULT   (0x00000000u)

Definition at line 847 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_GPIO2_11   (0x00000008u)

Definition at line 851 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_MASK   (0x000F0000u)

Definition at line 843 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_RESERVED2   (0x00000002u)

Definition at line 849 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_RESERVED4   (0x00000004u)

Definition at line 850 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_RESETVAL   (0x00000000u)

Definition at line 845 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_SHIFT   (0x00000010u)

Definition at line 844 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_19_16_SPI1_SOMI0   (0x00000001u)

Definition at line 848 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_DEFAULT   (0x00000000u)

Definition at line 837 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_GPIO2_10   (0x00000008u)

Definition at line 841 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_MASK   (0x00F00000u)

Definition at line 833 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_RESERVED2   (0x00000002u)

Definition at line 839 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_RESERVED4   (0x00000004u)

Definition at line 840 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_RESETVAL   (0x00000000u)

Definition at line 835 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_SHIFT   (0x00000014u)

Definition at line 834 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_23_20_SPI1_SIMO0   (0x00000001u)

Definition at line 838 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_DEFAULT   (0x00000000u)

Definition at line 827 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_EMA_BA1   (0x00000001u)

Definition at line 828 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_GPIO2_9   (0x00000008u)

Definition at line 831 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_MASK   (0x0F000000u)

Definition at line 823 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_RESERVED2   (0x00000002u)

Definition at line 829 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_RESERVED4   (0x00000004u)

Definition at line 830 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_RESETVAL   (0x00000000u)

Definition at line 825 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_27_24_SHIFT   (0x00000018u)

Definition at line 824 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_DEFAULT   (0x00000000u)

Definition at line 817 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_EMA_BA0   (0x00000001u)

Definition at line 818 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_GPIO2_8   (0x00000008u)

Definition at line 821 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_MASK   (0xF0000000u)

Definition at line 813 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_RESERVED2   (0x00000002u)

Definition at line 819 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_RESERVED4   (0x00000004u)

Definition at line 820 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_RESETVAL   (0x00000000u)

Definition at line 815 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_31_28_SHIFT   (0x0000001Cu)

Definition at line 814 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_DEFAULT   (0x00000000u)

Definition at line 887 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_EPWM1A   (0x00000002u)

Definition at line 889 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_GPIO2_15   (0x00000008u)

Definition at line 891 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_MASK   (0x0000000Fu)

Definition at line 883 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_NSPI1_SCS1   (0x00000001u)

Definition at line 888 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_PRU0_R30_8   (0x00000004u)

Definition at line 890 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_RESETVAL   (0x00000000u)

Definition at line 885 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_3_0_SHIFT   (0x00000000u)

Definition at line 884 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_DEFAULT   (0x00000000u)

Definition at line 877 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_EPWM1B   (0x00000002u)

Definition at line 879 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_GPIO2_14   (0x00000008u)

Definition at line 881 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_MASK   (0x000000F0u)

Definition at line 873 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_NSPI1_SCS0   (0x00000001u)

Definition at line 878 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_PRU0_R30_7   (0x00000004u)

Definition at line 880 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_RESETVAL   (0x00000000u)

Definition at line 875 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_PINMUX5_7_4_SHIFT   (0x00000004u)

Definition at line 874 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX5_RESETVAL   (0x00000000u)

Definition at line 893 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_DEFAULT   (0x00000000u)

Definition at line 951 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_GPIO2_5   (0x00000008u)

Definition at line 955 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_MASK   (0x00000F00u)

Definition at line 947 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_NEMA_RAS   (0x00000001u)

Definition at line 952 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_PRU0_R30_3   (0x00000004u)

Definition at line 954 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_RESERVED2   (0x00000002u)

Definition at line 953 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_RESETVAL   (0x00000000u)

Definition at line 949 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_11_8_SHIFT   (0x00000008u)

Definition at line 948 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_DEFAULT   (0x00000000u)

Definition at line 941 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_GPIO2_4   (0x00000008u)

Definition at line 945 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_MASK   (0x0000F000u)

Definition at line 937 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_NEMA_CAS   (0x00000001u)

Definition at line 942 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_PRU0_R30_2   (0x00000004u)

Definition at line 944 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_RESERVED2   (0x00000002u)

Definition at line 943 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_RESETVAL   (0x00000000u)

Definition at line 939 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_15_12_SHIFT   (0x0000000Cu)

Definition at line 938 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_DEFAULT   (0x00000000u)

Definition at line 931 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_GPIO2_3   (0x00000008u)

Definition at line 935 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_MASK   (0x000F0000u)

Definition at line 927 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_NEMA_WE_DQM0   (0x00000001u)

Definition at line 932 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_RESERVED2   (0x00000002u)

Definition at line 933 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_RESERVED4   (0x00000004u)

Definition at line 934 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_RESETVAL   (0x00000000u)

Definition at line 929 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_19_16_SHIFT   (0x00000010u)

Definition at line 928 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_DEFAULT   (0x00000000u)

Definition at line 921 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_GPIO2_2   (0x00000008u)

Definition at line 925 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_MASK   (0x00F00000u)

Definition at line 917 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_NEMA_WE_DQM1   (0x00000001u)

Definition at line 922 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_RESERVED2   (0x00000002u)

Definition at line 923 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_RESERVED4   (0x00000004u)

Definition at line 924 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_RESETVAL   (0x00000000u)

Definition at line 919 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_23_20_SHIFT   (0x00000014u)

Definition at line 918 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_DEFAULT   (0x00000000u)

Definition at line 911 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_EMA_WAIT1   (0x00000001u)

Definition at line 912 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_GPIO2_1   (0x00000008u)

Definition at line 915 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_MASK   (0x0F000000u)

Definition at line 907 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_PRU0_R30_1   (0x00000004u)

Definition at line 914 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_RESERVED2   (0x00000002u)

Definition at line 913 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_RESETVAL   (0x00000000u)

Definition at line 909 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_27_24_SHIFT   (0x00000018u)

Definition at line 908 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_DEFAULT   (0x00000000u)

Definition at line 901 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_GPIO2_0   (0x00000008u)

Definition at line 905 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_MASK   (0xF0000000u)

Definition at line 897 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_NEMA_CS0   (0x00000001u)

Definition at line 902 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_RESERVED2   (0x00000002u)

Definition at line 903 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_RESERVED4   (0x00000004u)

Definition at line 904 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_RESETVAL   (0x00000000u)

Definition at line 899 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_31_28_SHIFT   (0x0000001Cu)

Definition at line 898 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_DEFAULT   (0x00000000u)

Definition at line 971 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_EMA_CLK   (0x00000001u)

Definition at line 972 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_GPIO2_7   (0x00000008u)

Definition at line 975 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_MASK   (0x0000000Fu)

Definition at line 967 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_PRU0_R30_5   (0x00000004u)

Definition at line 974 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_RESERVED2   (0x00000002u)

Definition at line 973 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_RESETVAL   (0x00000000u)

Definition at line 969 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_3_0_SHIFT   (0x00000000u)

Definition at line 968 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_DEFAULT   (0x00000000u)

Definition at line 961 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_EMA_SDCKE   (0x00000001u)

Definition at line 962 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_GPIO2_6   (0x00000008u)

Definition at line 965 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_MASK   (0x000000F0u)

Definition at line 957 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_PRU0_R30_4   (0x00000004u)

Definition at line 964 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_RESERVED2   (0x00000002u)

Definition at line 963 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_RESETVAL   (0x00000000u)

Definition at line 959 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_PINMUX6_7_4_SHIFT   (0x00000004u)

Definition at line 958 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX6_RESETVAL   (0x00000000u)

Definition at line 977 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_DEFAULT   (0x00000000u)

Definition at line 1035 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_GPIO3_13   (0x00000008u)

Definition at line 1039 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_MASK   (0x00000F00u)

Definition at line 1031 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_NEMA_CS4   (0x00000001u)

Definition at line 1036 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_RESERVED2   (0x00000002u)

Definition at line 1037 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_RESERVED4   (0x00000004u)

Definition at line 1038 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_RESETVAL   (0x00000000u)

Definition at line 1033 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_11_8_SHIFT   (0x00000008u)

Definition at line 1032 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_DEFAULT   (0x00000000u)

Definition at line 1025 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_GPIO3_12   (0x00000008u)

Definition at line 1029 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_MASK   (0x0000F000u)

Definition at line 1021 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_NEMA_CS5   (0x00000001u)

Definition at line 1026 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_RESERVED2   (0x00000002u)

Definition at line 1027 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_RESERVED4   (0x00000004u)

Definition at line 1028 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_RESETVAL   (0x00000000u)

Definition at line 1023 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_15_12_SHIFT   (0x0000000Cu)

Definition at line 1022 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_DEFAULT   (0x00000000u)

Definition at line 1015 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_GPIO3_11   (0x00000008u)

Definition at line 1019 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_MASK   (0x000F0000u)

Definition at line 1011 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_NEMA_WE   (0x00000001u)

Definition at line 1016 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_RESERVED2   (0x00000002u)

Definition at line 1017 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_RESERVED4   (0x00000004u)

Definition at line 1018 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_RESETVAL   (0x00000000u)

Definition at line 1013 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_19_16_SHIFT   (0x00000010u)

Definition at line 1012 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_DEFAULT   (0x00000000u)

Definition at line 1005 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_GPIO3_10   (0x00000008u)

Definition at line 1009 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_MASK   (0x00F00000u)

Definition at line 1001 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_NEMA_OE   (0x00000001u)

Definition at line 1006 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_RESERVED2   (0x00000002u)

Definition at line 1007 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_RESERVED4   (0x00000004u)

Definition at line 1008 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_RESETVAL   (0x00000000u)

Definition at line 1003 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_23_20_SHIFT   (0x00000014u)

Definition at line 1002 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_DEFAULT   (0x00000000u)

Definition at line 995 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_GPIO3_9   (0x00000008u)

Definition at line 999 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_MASK   (0x0F000000u)

Definition at line 991 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_NEMA_RNW   (0x00000001u)

Definition at line 996 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_RESERVED2   (0x00000002u)

Definition at line 997 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_RESERVED4   (0x00000004u)

Definition at line 998 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_RESETVAL   (0x00000000u)

Definition at line 993 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_27_24_SHIFT   (0x00000018u)

Definition at line 992 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_DEFAULT   (0x00000000u)

Definition at line 985 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_EMA_WAIT0   (0x00000001u)

Definition at line 986 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_GPIO3_8   (0x00000008u)

Definition at line 989 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_MASK   (0xF0000000u)

Definition at line 981 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_PRU0_R30_0   (0x00000004u)

Definition at line 988 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_RESERVED2   (0x00000002u)

Definition at line 987 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_RESETVAL   (0x00000000u)

Definition at line 983 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_31_28_SHIFT   (0x0000001Cu)

Definition at line 982 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_DEFAULT   (0x00000000u)

Definition at line 1055 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_GPIO3_15   (0x00000008u)

Definition at line 1059 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_MASK   (0x0000000Fu)

Definition at line 1051 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_NEMA_CS2   (0x00000001u)

Definition at line 1056 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_RESERVED2   (0x00000002u)

Definition at line 1057 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_RESERVED4   (0x00000004u)

Definition at line 1058 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_RESETVAL   (0x00000000u)

Definition at line 1053 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_3_0_SHIFT   (0x00000000u)

Definition at line 1052 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_DEFAULT   (0x00000000u)

Definition at line 1045 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_GPIO3_14   (0x00000008u)

Definition at line 1049 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_MASK   (0x000000F0u)

Definition at line 1041 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_NEMA_CS3   (0x00000001u)

Definition at line 1046 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_RESERVED2   (0x00000002u)

Definition at line 1047 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_RESERVED4   (0x00000004u)

Definition at line 1048 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_RESETVAL   (0x00000000u)

Definition at line 1043 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_PINMUX7_7_4_SHIFT   (0x00000004u)

Definition at line 1042 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX7_RESETVAL   (0x00000000u)

Definition at line 1061 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_DEFAULT   (0x00000000u)

Definition at line 1119 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_EMA_D13   (0x00000001u)

Definition at line 1120 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_GPIO3_5   (0x00000008u)

Definition at line 1123 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_MASK   (0x00000F00u)

Definition at line 1115 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_RESERVED2   (0x00000002u)

Definition at line 1121 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_RESERVED4   (0x00000004u)

Definition at line 1122 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_RESETVAL   (0x00000000u)

Definition at line 1117 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_11_8_SHIFT   (0x00000008u)

Definition at line 1116 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_DEFAULT   (0x00000000u)

Definition at line 1109 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_EMA_D12   (0x00000001u)

Definition at line 1110 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_GPIO3_4   (0x00000008u)

Definition at line 1113 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_MASK   (0x0000F000u)

Definition at line 1105 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_RESERVED2   (0x00000002u)

Definition at line 1111 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_RESERVED4   (0x00000004u)

Definition at line 1112 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_RESETVAL   (0x00000000u)

Definition at line 1107 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_15_12_SHIFT   (0x0000000Cu)

Definition at line 1106 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_DEFAULT   (0x00000000u)

Definition at line 1099 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_EMA_D11   (0x00000001u)

Definition at line 1100 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_GPIO3_3   (0x00000008u)

Definition at line 1103 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_MASK   (0x000F0000u)

Definition at line 1095 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_RESERVED2   (0x00000002u)

Definition at line 1101 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_RESERVED4   (0x00000004u)

Definition at line 1102 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_RESETVAL   (0x00000000u)

Definition at line 1097 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_19_16_SHIFT   (0x00000010u)

Definition at line 1096 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_DEFAULT   (0x00000000u)

Definition at line 1089 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_EMA_D10   (0x00000001u)

Definition at line 1090 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_GPIO3_2   (0x00000008u)

Definition at line 1093 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_MASK   (0x00F00000u)

Definition at line 1085 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_RESERVED2   (0x00000002u)

Definition at line 1091 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_RESERVED4   (0x00000004u)

Definition at line 1092 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_RESETVAL   (0x00000000u)

Definition at line 1087 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_23_20_SHIFT   (0x00000014u)

Definition at line 1086 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_DEFAULT   (0x00000000u)

Definition at line 1079 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_EMA_D9   (0x00000001u)

Definition at line 1080 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_GPIO3_1   (0x00000008u)

Definition at line 1083 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_MASK   (0x0F000000u)

Definition at line 1075 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_RESERVED2   (0x00000002u)

Definition at line 1081 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_RESERVED4   (0x00000004u)

Definition at line 1082 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_RESETVAL   (0x00000000u)

Definition at line 1077 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_27_24_SHIFT   (0x00000018u)

Definition at line 1076 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_DEFAULT   (0x00000000u)

Definition at line 1069 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_EMA_D8   (0x00000001u)

Definition at line 1070 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_GPIO3_0   (0x00000008u)

Definition at line 1073 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_MASK   (0xF0000000u)

Definition at line 1065 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_RESERVED2   (0x00000002u)

Definition at line 1071 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_RESERVED4   (0x00000004u)

Definition at line 1072 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_RESETVAL   (0x00000000u)

Definition at line 1067 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_31_28_SHIFT   (0x0000001Cu)

Definition at line 1066 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_DEFAULT   (0x00000000u)

Definition at line 1139 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_EMA_D15   (0x00000001u)

Definition at line 1140 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_GPIO3_7   (0x00000008u)

Definition at line 1143 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_MASK   (0x0000000Fu)

Definition at line 1135 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_RESERVED2   (0x00000002u)

Definition at line 1141 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_RESERVED4   (0x00000004u)

Definition at line 1142 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_RESETVAL   (0x00000000u)

Definition at line 1137 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_3_0_SHIFT   (0x00000000u)

Definition at line 1136 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_DEFAULT   (0x00000000u)

Definition at line 1129 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_EMA_D14   (0x00000001u)

Definition at line 1130 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_GPIO3_6   (0x00000008u)

Definition at line 1133 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_MASK   (0x000000F0u)

Definition at line 1125 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_RESERVED2   (0x00000002u)

Definition at line 1131 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_RESERVED4   (0x00000004u)

Definition at line 1132 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_RESETVAL   (0x00000000u)

Definition at line 1127 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_PINMUX8_7_4_SHIFT   (0x00000004u)

Definition at line 1126 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX8_RESETVAL   (0x00000000u)

Definition at line 1145 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_DEFAULT   (0x00000000u)

Definition at line 1203 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_EMA_D5   (0x00000001u)

Definition at line 1204 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_GPIO4_13   (0x00000008u)

Definition at line 1207 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_MASK   (0x00000F00u)

Definition at line 1199 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_RESERVED2   (0x00000002u)

Definition at line 1205 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_RESERVED4   (0x00000004u)

Definition at line 1206 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_RESETVAL   (0x00000000u)

Definition at line 1201 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_11_8_SHIFT   (0x00000008u)

Definition at line 1200 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_DEFAULT   (0x00000000u)

Definition at line 1193 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_EMA_D4   (0x00000001u)

Definition at line 1194 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_GPIO4_12   (0x00000008u)

Definition at line 1197 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_MASK   (0x0000F000u)

Definition at line 1189 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_RESERVED2   (0x00000002u)

Definition at line 1195 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_RESERVED4   (0x00000004u)

Definition at line 1196 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_RESETVAL   (0x00000000u)

Definition at line 1191 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_15_12_SHIFT   (0x0000000Cu)

Definition at line 1190 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_DEFAULT   (0x00000000u)

Definition at line 1183 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_EMA_D3   (0x00000001u)

Definition at line 1184 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_GPIO4_11   (0x00000008u)

Definition at line 1187 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_MASK   (0x000F0000u)

Definition at line 1179 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_RESERVED2   (0x00000002u)

Definition at line 1185 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_RESERVED4   (0x00000004u)

Definition at line 1186 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_RESETVAL   (0x00000000u)

Definition at line 1181 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_19_16_SHIFT   (0x00000010u)

Definition at line 1180 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_DEFAULT   (0x00000000u)

Definition at line 1173 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_EMA_D2   (0x00000001u)

Definition at line 1174 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_GPIO4_10   (0x00000008u)

Definition at line 1177 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_MASK   (0x00F00000u)

Definition at line 1169 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_RESERVED2   (0x00000002u)

Definition at line 1175 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_RESERVED4   (0x00000004u)

Definition at line 1176 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_RESETVAL   (0x00000000u)

Definition at line 1171 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_23_20_SHIFT   (0x00000014u)

Definition at line 1170 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_DEFAULT   (0x00000000u)

Definition at line 1163 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_EMA_D1   (0x00000001u)

Definition at line 1164 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_GPIO4_9   (0x00000008u)

Definition at line 1167 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_MASK   (0x0F000000u)

Definition at line 1159 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_RESERVED2   (0x00000002u)

Definition at line 1165 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_RESERVED4   (0x00000004u)

Definition at line 1166 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_RESETVAL   (0x00000000u)

Definition at line 1161 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_27_24_SHIFT   (0x00000018u)

Definition at line 1160 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_DEFAULT   (0x00000000u)

Definition at line 1153 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_EMA_D0   (0x00000001u)

Definition at line 1154 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_GPIO4_8   (0x00000008u)

Definition at line 1157 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_MASK   (0xF0000000u)

Definition at line 1149 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_RESERVED2   (0x00000002u)

Definition at line 1155 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_RESERVED4   (0x00000004u)

Definition at line 1156 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_RESETVAL   (0x00000000u)

Definition at line 1151 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_31_28_SHIFT   (0x0000001Cu)

Definition at line 1150 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_DEFAULT   (0x00000000u)

Definition at line 1223 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_EMA_D7   (0x00000001u)

Definition at line 1224 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_GPIO4_15   (0x00000008u)

Definition at line 1227 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_MASK   (0x0000000Fu)

Definition at line 1219 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_RESERVED2   (0x00000002u)

Definition at line 1225 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_RESERVED4   (0x00000004u)

Definition at line 1226 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_RESETVAL   (0x00000000u)

Definition at line 1221 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_3_0_SHIFT   (0x00000000u)

Definition at line 1220 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_DEFAULT   (0x00000000u)

Definition at line 1213 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_EMA_D6   (0x00000001u)

Definition at line 1214 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_GPIO4_14   (0x00000008u)

Definition at line 1217 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_MASK   (0x000000F0u)

Definition at line 1209 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_RESERVED2   (0x00000002u)

Definition at line 1215 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_RESERVED4   (0x00000004u)

Definition at line 1216 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_RESETVAL   (0x00000000u)

Definition at line 1211 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_PINMUX9_7_4_SHIFT   (0x00000004u)

Definition at line 1210 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_PINMUX9_RESETVAL   (0x00000000u)

Definition at line 1229 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_REVID_RESETVAL   (0x00000000u)

Definition at line 104 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_REVID_REVID_MASK   (0xFFFFFFFFu)

Definition at line 100 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_REVID_REVID_RESETVAL   (0x00000000u)

Definition at line 102 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_REVID_REVID_SHIFT   (0x00000000u)

Definition at line 101 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_ARM   (0x00000000u)

Definition at line 2245 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_DSP   (0x00000001u)

Definition at line 2246 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_MASK   (0x00000001u)

Definition at line 2241 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_RESETVAL   (0x00000001u)

Definition at line 2243 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP0SRC_SHIFT   (0x00000000u)

Definition at line 2242 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_ARM   (0x00000000u)

Definition at line 2238 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_DSP   (0x00000001u)

Definition at line 2239 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_MASK   (0x00000002u)

Definition at line 2234 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_RESETVAL   (0x00000001u)

Definition at line 2236 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP1SRC_SHIFT   (0x00000001u)

Definition at line 2235 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_ARM   (0x00000000u)

Definition at line 2231 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_DSP   (0x00000001u)

Definition at line 2232 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_MASK   (0x00000004u)

Definition at line 2227 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_RESETVAL   (0x00000001u)

Definition at line 2229 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_ECAP2SRC_SHIFT   (0x00000002u)

Definition at line 2228 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EMACSRC_ARM   (0x00000000u)

Definition at line 2210 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EMACSRC_DSP   (0x00000001u)

Definition at line 2211 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EMACSRC_MASK   (0x00000020u)

Definition at line 2206 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EMACSRC_RESETVAL   (0x00000001u)

Definition at line 2208 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EMACSRC_SHIFT   (0x00000005u)

Definition at line 2207 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_ARM   (0x00000000u)

Definition at line 2105 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_DSP   (0x00000001u)

Definition at line 2106 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_MASK   (0x00800000u)

Definition at line 2101 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_RESETVAL   (0x00000001u)

Definition at line 2103 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM0SRC_SHIFT   (0x00000017u)

Definition at line 2102 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_ARM   (0x00000000u)

Definition at line 2098 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_DSP   (0x00000001u)

Definition at line 2099 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_MASK   (0x01000000u)

Definition at line 2094 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_RESETVAL   (0x00000001u)

Definition at line 2096 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_EPWM1SRC_SHIFT   (0x00000018u)

Definition at line 2095 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_HPISRC_ARM   (0x00000000u)

Definition at line 2175 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_HPISRC_DSP   (0x00000001u)

Definition at line 2176 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_HPISRC_MASK   (0x00001000u)

Definition at line 2171 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_HPISRC_RESETVAL   (0x00000001u)

Definition at line 2173 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_HPISRC_SHIFT   (0x0000000Cu)

Definition at line 2172 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C0SRC_ARM   (0x00000000u)

Definition at line 2154 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C0SRC_DSP   (0x00000001u)

Definition at line 2155 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C0SRC_MASK   (0x00010000u)

Definition at line 2150 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C0SRC_RESETVAL   (0x00000001u)

Definition at line 2152 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C0SRC_SHIFT   (0x00000010u)

Definition at line 2151 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C1SRC_ARM   (0x00000000u)

Definition at line 2147 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C1SRC_DSP   (0x00000001u)

Definition at line 2148 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C1SRC_MASK   (0x00020000u)

Definition at line 2143 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C1SRC_RESETVAL   (0x00000001u)

Definition at line 2145 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_I2C1SRC_SHIFT   (0x00000011u)

Definition at line 2144 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_ARM   (0x00000000u)

Definition at line 2196 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_DSP   (0x00000001u)

Definition at line 2197 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_MASK   (0x00000080u)

Definition at line 2192 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_RESETVAL   (0x00000001u)

Definition at line 2194 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP0SRC_SHIFT   (0x00000007u)

Definition at line 2193 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_ARM   (0x00000000u)

Definition at line 2189 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_DSP   (0x00000001u)

Definition at line 2190 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_MASK   (0x00000100u)

Definition at line 2185 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_RESETVAL   (0x00000001u)

Definition at line 2187 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_MCBSP1SRC_SHIFT   (0x00000008u)

Definition at line 2186 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_PRUSRC_ARM   (0x00000000u)

Definition at line 2203 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_PRUSRC_DSP   (0x00000001u)

Definition at line 2204 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_PRUSRC_MASK   (0x00000040u)

Definition at line 2199 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_PRUSRC_RESETVAL   (0x00000001u)

Definition at line 2201 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_PRUSRC_SHIFT   (0x00000006u)

Definition at line 2200 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_RESETVAL   (0x7BFFF7FFu)

Definition at line 2248 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SATASRC_ARM   (0x00000000u)

Definition at line 2168 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SATASRC_DSP   (0x00000001u)

Definition at line 2169 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SATASRC_MASK   (0x00002000u)

Definition at line 2164 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SATASRC_RESETVAL   (0x00000001u)

Definition at line 2166 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SATASRC_SHIFT   (0x0000000Du)

Definition at line 2165 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI0SRC_ARM   (0x00000000u)

Definition at line 2119 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI0SRC_DSP   (0x00000001u)

Definition at line 2120 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI0SRC_MASK   (0x00200000u)

Definition at line 2115 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI0SRC_RESETVAL   (0x00000001u)

Definition at line 2117 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI0SRC_SHIFT   (0x00000015u)

Definition at line 2116 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI1SRC_ARM   (0x00000000u)

Definition at line 2112 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI1SRC_DSP   (0x00000001u)

Definition at line 2113 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI1SRC_MASK   (0x00400000u)

Definition at line 2108 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI1SRC_RESETVAL   (0x00000001u)

Definition at line 2110 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_SPI1SRC_SHIFT   (0x00000016u)

Definition at line 2109 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_ARM   (0x00000000u)

Definition at line 2091 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_DSP   (0x00000001u)

Definition at line 2092 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_MASK   (0x08000000u)

Definition at line 2087 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_RESETVAL   (0x00000001u)

Definition at line 2089 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_0SRC_SHIFT   (0x0000001Bu)

Definition at line 2088 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_ARM   (0x00000000u)

Definition at line 2084 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_DSP   (0x00000001u)

Definition at line 2085 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_MASK   (0x10000000u)

Definition at line 2080 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_RESETVAL   (0x00000001u)

Definition at line 2082 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_1SRC_SHIFT   (0x0000001Cu)

Definition at line 2081 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_ARM   (0x00000000u)

Definition at line 2077 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_DSP   (0x00000001u)

Definition at line 2078 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_MASK   (0x20000000u)

Definition at line 2073 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_RESETVAL   (0x00000001u)

Definition at line 2075 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_2SRC_SHIFT   (0x0000001Du)

Definition at line 2074 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_ARM   (0x00000000u)

Definition at line 2224 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_DSP   (0x00000001u)

Definition at line 2225 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_MASK   (0x00000008u)

Definition at line 2220 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_RESETVAL   (0x00000001u)

Definition at line 2222 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_TIMER64P_3SRC_SHIFT   (0x00000003u)

Definition at line 2221 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART0SRC_ARM   (0x00000000u)

Definition at line 2140 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART0SRC_DSP   (0x00000001u)

Definition at line 2141 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART0SRC_MASK   (0x00040000u)

Definition at line 2136 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART0SRC_RESETVAL   (0x00000001u)

Definition at line 2138 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART0SRC_SHIFT   (0x00000012u)

Definition at line 2137 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART1SRC_ARM   (0x00000000u)

Definition at line 2133 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART1SRC_DSP   (0x00000001u)

Definition at line 2134 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART1SRC_MASK   (0x00080000u)

Definition at line 2129 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART1SRC_RESETVAL   (0x00000001u)

Definition at line 2131 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART1SRC_SHIFT   (0x00000013u)

Definition at line 2130 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART2SRC_ARM   (0x00000000u)

Definition at line 2126 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART2SRC_DSP   (0x00000001u)

Definition at line 2127 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART2SRC_MASK   (0x00100000u)

Definition at line 2122 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART2SRC_RESETVAL   (0x00000001u)

Definition at line 2124 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UART2SRC_SHIFT   (0x00000014u)

Definition at line 2123 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UPPSRC_ARM   (0x00000000u)

Definition at line 2217 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UPPSRC_DSP   (0x00000001u)

Definition at line 2218 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UPPSRC_MASK   (0x00000010u)

Definition at line 2213 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UPPSRC_RESETVAL   (0x00000001u)

Definition at line 2215 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_UPPSRC_SHIFT   (0x00000004u)

Definition at line 2214 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_USB0SRC_ARM   (0x00000000u)

Definition at line 2182 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_USB0SRC_DSP   (0x00000001u)

Definition at line 2183 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_USB0SRC_MASK   (0x00000200u)

Definition at line 2178 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_USB0SRC_RESETVAL   (0x00000001u)

Definition at line 2180 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_USB0SRC_SHIFT   (0x00000009u)

Definition at line 2179 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_VPIFSRC_ARM   (0x00000000u)

Definition at line 2161 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_VPIFSRC_DSP   (0x00000001u)

Definition at line 2162 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_VPIFSRC_MASK   (0x00004000u)

Definition at line 2157 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_VPIFSRC_RESETVAL   (0x00000001u)

Definition at line 2159 of file cslr_syscfg0_OMAPL138.h.

#define CSL_SYSCFG_SUSPSRC_VPIFSRC_SHIFT   (0x0000000Eu)

Definition at line 2158 of file cslr_syscfg0_OMAPL138.h.

Typedef Documentation

typedef volatile CSL_SyscfgRegs* CSL_SyscfgRegsOvly

Definition at line 92 of file cslr_syscfg0_OMAPL138.h.