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suart_pru_regs.h
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1 /*
2  * linux/<file location within the kernel tree>
3  *
4  * Copyright (C) 2010 Texas Instruments Incorporated
5  * Author: jitendra@mistralsolutions.com
6  *
7  * Based on <Give reference of old kernel file from which this file is derived from>
8  *
9  * This program is free software; you can redistribute it and/or modify it
10  * under the terms of the GNU General Public License as published by the
11  * Free Software Foundation version 2.
12  *
13  * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
14  * whether express or implied; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16  * General Public License for more details.
17  */
18 
19 #ifndef _SUART_PRU_REGS_H_
20 #define _SUART_PRU_REGS_H_
21 
22 #ifdef __cplusplus
23 extern "C" {
24 #endif
25 
26 /*
27  *====================
28  * Includes
29  *====================
30  */
31 #include "tistdtypes.h"
32 
33 /*
34  *====================
35  * Defines
36  *====================
37  */
38 
39 #define PRU_DATARAM_BASE_ADDR (0x01C30000u)
40 
41 #define PRU0_DATARAM0_OFFSET (0x0000u)
42 
44 #define PRU0_DATARAM1_OFFSET (0x2000u)
45 
47 #define PRU_SUART_DATARAM0_BASE (PRU_DATARAM_BASE_ADDR + PRU0_DATARAM0_OFFSET)
48 
50 #define PRU_SUART_DATARAM1_BASE (PRU_DATARAM_BASE_ADDR + PRU0_DATARAM0_OFFSET)
51 
53 #define PRU_SUART_PRU0_CH0_OFFSET (0x0000)
54 
55 #define PRU_SUART_PRU0_CH1_OFFSET (0x0010)
56 
57 #define PRU_SUART_PRU0_CH2_OFFSET (0x0020)
58 
59 #define PRU_SUART_PRU0_CH3_OFFSET (0x0030)
60 
61 #define PRU_SUART_PRU0_CH4_OFFSET (0x0040)
62 
63 #define PRU_SUART_PRU0_CH5_OFFSET (0x0050)
64 
65 #define PRU_SUART_PRU0_CH6_OFFSET (0x0060)
66 
67 #define PRU_SUART_PRU0_CH7_OFFSET (0x0070)
68 
70 #define PRU_SUART_PRU0_IMR_OFFSET (0x0080)
71 
73 #define PRU_SUART_PRU0_ISR_OFFSET (0x0082)
74 
76 #define PRU_SUART_PRU0_ID_ADDR (0x0084)
77 
79 #define PRU_SUART_PRU0_RX_TX_MODE (0x0085)
80 
81 #define PRU_SUART_PRU0_DELAY_OFFSET (0x0086)
82 #define PRU_SUART_PRU0_IDLE_TIMEOUT_OFFSET (0x0088)
83 
84 /* ********* PRU 1 Macros ************* */
85 #define PRU_SUART_PRU1_CH0_OFFSET (0x2000)
86 
88 #define PRU_SUART_PRU1_CH1_OFFSET (0x2010)
89 
91 #define PRU_SUART_PRU1_CH2_OFFSET (0x2020)
92 
94 #define PRU_SUART_PRU1_CH3_OFFSET (0x2030)
95 
97 #define PRU_SUART_PRU1_CH4_OFFSET (0x2040)
98 
100 #define PRU_SUART_PRU1_CH5_OFFSET (0x2050)
101 
103 #define PRU_SUART_PRU1_CH6_OFFSET (0x2060)
104 
106 #define PRU_SUART_PRU1_CH7_OFFSET (0x2070)
107 
109 #define PRU_SUART_PRU1_IMR_OFFSET (0x2080)
110 
112 #define PRU_SUART_PRU1_ISR_OFFSET (0x2082)
113 
115 #define PRU_SUART_PRU1_ID_ADDR (0x2084)
116 
118 #define PRU_SUART_PRU1_RX_TX_MODE (0x2085)
119 
120 #define PRU_SUART_PRU1_DELAY_OFFSET (0x2086)
121 
122 #define PRU_SUART_PRU1_IDLE_TIMEOUT_OFFSET (0x2088)
123 
124 
125 /* SUART Channel Control Register bit descriptions */
126 #define PRU_SUART_CH_CTRL_MODE_SHIFT 0x0000
127 #define PRU_SUART_CH_CTRL_MODE_MASK 0x0003
128 #define PRU_SUART_CH_CTRL_TX_MODE 0x0001
129 #define PRU_SUART_CH_CTRL_RX_MODE 0x0002
130 
131 /* Service Request */
132 #define PRU_SUART_CH_CTRL_SREQ_SHIFT 0x0002
133 #define PRU_SUART_CH_CTRL_SREQ_MASK 0x0004
134 #define PRU_SUART_CH_CTRL_SREQ 0x0001
135 
136 /* McASP Instance */
137 #define PRU_SUART_CH_CTRL_MCASP_SHIFT 0x0003
138 #define PRU_SUART_CH_CTRL_MCASP_MASK 0x0018
139 
140 #define PRU_SUART_CH_CTRL_SR_SHIFT 0x0008
141 #define PRU_SUART_CH_CTRL_SR_MASK 0x0F00
142 
143 /* SUART channel configuration1 register descriptions */
144 
145 /* clock divisor - relative baud value */
146 #define PRU_SUART_CH_CONFIG1_DIVISOR_SHIFT 0x0000
147 #define PRU_SUART_CH_CONFIG1_DIVISOR_MASK 0x03FF
148 /* oversampling */
149 #define PRU_SUART_CH_CONFIG1_OVS_SHIFT 0x000A
150 #define PRU_SUART_CH_CONFIG1_OVS_MASK 0x0C00
151 
152 /* SUART channel configuration2 register descriptions */
153 /* Bits per character */
154 #define PRU_SUART_CH_CONFIG2_BITPERCHAR_SHIFT 0x0000
155 #define PRU_SUART_CH_CONFIG2_BITPERCHAR_MASK 0x000F
156 
157 /* Bits per character */
158 #define PRU_SUART_CH_CONFIG2_DATALEN_SHIFT 0x0008
159 #define PRU_SUART_CH_CONFIG2_DATALEN_MASK 0x0F00
160 
161 /* SUART Channel STATUS Register*/
162 #define PRU_SUART_CH_STATUS_EN_BIT_MASK 0x8000
163 
164 /* SUART Channel register offsets */
165 #define PRU_SUART_CH_CTRL_OFFSET 0x00
166 #define PRU_SUART_CH_CONFIG1_OFFSET 0x02
167 #define PRU_SUART_CH_CONFIG2_OFFSET 0x04
168 #define PRU_SUART_CH_TXRXSTATUS_OFFSET 0x06
169 #define PRU_SUART_CH_TXRXDATA_OFFSET 0x08
170 #define PRU_SUART_CH_BYTESDONECNTR_OFFSET 0x0C
171 
172 /* SUART Event Numbers macros */
173 #define PRU_SUART0_TX_EVT 34
174 #define PRU_SUART0_RX_EVT 35
175 #define PRU_SUART1_TX_EVT 36
176 #define PRU_SUART1_RX_EVT 37
177 #define PRU_SUART2_TX_EVT 38
178 #define PRU_SUART2_RX_EVT 39
179 #define PRU_SUART3_TX_EVT 40
180 #define PRU_SUART3_RX_EVT 41
181 #define PRU_SUART4_TX_EVT 42
182 #define PRU_SUART4_RX_EVT 43
183 #define PRU_SUART5_TX_EVT 44
184 #define PRU_SUART5_RX_EVT 45
185 #define PRU_SUART6_TX_EVT 46
186 #define PRU_SUART6_RX_EVT 47
187 #define PRU_SUART7_TX_EVT 48
188 #define PRU_SUART7_RX_EVT 49
189 
190 #define PRU_SUART0_TX_EVT_BIT BIT(2)
191 #define PRU_SUART0_RX_EVT_BIT BIT(3)
192 #define PRU_SUART1_TX_EVT_BIT BIT(4)
193 #define PRU_SUART1_RX_EVT_BIT BIT(5)
194 #define PRU_SUART2_TX_EVT_BIT BIT(6)
195 #define PRU_SUART2_RX_EVT_BIT BIT(7)
196 #define PRU_SUART3_TX_EVT_BIT BIT(8)
197 #define PRU_SUART3_RX_EVT_BIT BIT(9)
198 #define PRU_SUART4_TX_EVT_BIT BIT(10)
199 #define PRU_SUART4_RX_EVT_BIT BIT(11)
200 #define PRU_SUART5_TX_EVT_BIT BIT(12)
201 #define PRU_SUART5_RX_EVT_BIT BIT(13)
202 #define PRU_SUART6_TX_EVT_BIT BIT(14)
203 #define PRU_SUART6_RX_EVT_BIT BIT(15)
204 #define PRU_SUART7_TX_EVT_BIT BIT(16)
205 #define PRU_SUART7_RX_EVT_BIT BIT(17)
206 
212  typedef struct {
213  unsigned short CHn_Ctrl;
214  unsigned short CHn_Config1;
216  unsigned short CHn_Config2;
218  unsigned short CHn_TXRXStatus;
220  unsigned int CHn_TXRXData;
222 
223 #ifdef __cplusplus
224 } /* End of extern C */
225 #endif /* #ifdef __cplusplus */
226 #endif
unsigned short CHn_Config1
unsigned short CHn_Ctrl
unsigned int CHn_TXRXData
One line description of the structure.
unsigned short CHn_TXRXStatus
unsigned short CHn_Config2